Skip to content

Commit

Permalink
Various optimizations
Browse files Browse the repository at this point in the history
  • Loading branch information
Gericom committed May 6, 2017
1 parent a61e70e commit 216734d
Show file tree
Hide file tree
Showing 10 changed files with 396 additions and 477 deletions.
16 changes: 11 additions & 5 deletions arm9/source/aborthandler_asm.s
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
.section .itcm
.altmacro

.include "consts.s"
#include "consts.s"

//#define DEBUG_ABORT_ADDRESS

Expand All @@ -14,11 +14,17 @@
data_abort_handler:
//ldr sp,= 0x33333333

mov sp, #0x33
orr sp, sp, lsl #8
orr sp, sp, lsl #16
//mov sp, #0x33
//orr sp, sp, lsl #8
//orr sp, sp, lsl #16

//mcr p15, 0, sp, c5, c0, 2

//make use of the backwards compatible version
//of the data rights register, so we can use 0xFFFFFFFF instead of 0x33333333
mov sp, #0xFFFFFFFF
mcr p15, 0, sp, c5, c0, 0

mcr p15, 0, sp, c5, c0, 2
mrs sp, spsr
tst sp, #0x20 //thumb bit
bne data_abort_handler_thumb
Expand Down
44 changes: 28 additions & 16 deletions arm9/source/consts.s
Original file line number Diff line number Diff line change
@@ -1,29 +1,37 @@

#ifdef __ASSEMBLER__
address_dtcm = 0x04F00000 @0x01800000
#ifndef __CONSTS_H__
#define __CONSTS_H__

#define SD_CACHE_SIZE (1424 * 1024)

reg_table = address_dtcm
#define MAIN_MEMORY_ADDRESS_ROM_DATA 0x02040000
#define MAIN_MEMORY_ADDRESS_GBARUNNER_DATA 0x02240000
#define ROM_DATA_LENGTH (MAIN_MEMORY_ADDRESS_GBARUNNER_DATA - MAIN_MEMORY_ADDRESS_ROM_DATA)
#define ROM_ADDRESS_MAX (0x08000000 + ROM_DATA_LENGTH)

address_count_bit_table = (address_dtcm + 0x40)
#define address_dtcm 0x04F00000 //0x01800000
#define reg_table address_dtcm

address_read_table_32bit_dtcm = (address_dtcm + 0x86C) @0x1000086C
address_read_table_16bit_dtcm = (address_dtcm + 0x974) @0x10000974
address_read_table_8bit_dtcm = (address_dtcm + 0xB80) @0x10000B80
#define address_count_bit_table (address_dtcm + 0x40)

address_write_table_32bit_dtcm = (address_dtcm + 0x140) @0x10000140
address_write_table_16bit_dtcm = (address_dtcm + 0x248) @0x10000248
address_write_table_8bit_dtcm = (address_dtcm + 0x454) @0x10000454
#define address_read_table_32bit_dtcm (address_dtcm + 0x86C) //0x1000086C
#define address_read_table_16bit_dtcm (address_dtcm + 0x974) //0x10000974
#define address_read_table_8bit_dtcm (address_dtcm + 0xB80) //0x10000B80

sd_cluster_cache = 0x06820000
#define address_write_table_32bit_dtcm (address_dtcm + 0x140) //0x10000140
#define address_write_table_16bit_dtcm (address_dtcm + 0x248) //0x10000248
#define address_write_table_8bit_dtcm (address_dtcm + 0x454) //0x10000454

sd_data_base = 0x06840000
sd_is_cluster_cached_table = (sd_data_base + (224 * 1024)) @(96 * 1024))
sd_cluster_cache_info = (sd_is_cluster_cached_table + (16 * 1024))
sd_sd_info = (sd_cluster_cache_info + (256 * 8 + 4)) @0x0685C404
#define sd_cluster_cache (MAIN_MEMORY_ADDRESS_GBARUNNER_DATA) //0x06820000

#define sd_data_base (sd_cluster_cache + SD_CACHE_SIZE) //0x06840000
#define sd_is_cluster_cached_table (sd_data_base + (32 * 1024)) //(96 * 1024))
#define sd_cluster_cache_info (sd_is_cluster_cached_table + (2 * 64 * 1024))
#define sd_sd_info (sd_cluster_cache_info + (4096 * 8 + 4)) //0x0685C404

pu_data_permissions = 0x33600603 @0x33600003 @0x33660003
#define pu_data_permissions 0x33600603 //0x33600003 //0x33660003

#ifdef __ASSEMBLER__
@destroys r12, r13
.macro printreg reg
mov r13, r0
Expand All @@ -36,6 +44,8 @@ pu_data_permissions = 0x33600603 @0x33600003 @0x33660003
.endm
#endif



/*#define CACHE_STRATEGY_LRU*/
/*this strategy is very bad as well*/
/*#define CACHE_STRATEGY_MRU*/
Expand All @@ -47,3 +57,5 @@ pu_data_permissions = 0x33600603 @0x33600003 @0x33660003
#define CACHE_BLOCK_SIZE_SHIFT 9
#define CACHE_BLOCK_SIZE (1 << CACHE_BLOCK_SIZE_SHIFT)
#define CACHE_BLOCK_SIZE_MASK (CACHE_BLOCK_SIZE - 1)

#endif
Loading

0 comments on commit 216734d

Please sign in to comment.