The main reason to remove the ground pads is assembly reliability. In
previous boards it was observed that it is fairly easy to create shorts
between the ground pads and signal pads of the package.

The previous footprint was causing the solder stop webbing to be very
thin which can result in the webbing missing on PCBs and result in
shorts during reflow.

The datasheet has a finer footprint with smaller pads and smaller Via
drills.

This change seems like a big diff but it only really changes SOIC-8 and
MSOP-8. They mostly bring roundrect changes and increase pad length for
better fileting.

* The 8x resistor arrays are not as common as 4x. Thus the 8x end up being
more expensive and harder to source.
* The SOT-563 package has slightly harder to solder than the SOT-363.
Also the level shifter in SOT-363 is lower cost.

All footprints that are still not roundrect in the official KiCad
library moved to local Glasgow footprint library and updated to
roundrect pads.

Also made a version of the 2x22 pin 1.27mm pitch LVDS connector with
alignment pins. This will allow us to have accurate enough position of
the connector so we can reliably connect to it in the pogopin tester and
to possible daugter boards.

As part of rerouting also moved half of the power via under the
packages. We regained some space thanks to that resulting in slightly
cleaner routing.

All part IDs and values are now meant to be printed on the Fab layer as
hardcopy manual assembly and population guide. The space on the
silkscreen used for part IDs was partly traded against logical circuit
block documentation. This is just the first pass and meant as a stepping
stone. The goal is to have the logical functionality be as self
descriptive on the silkscreen as possible.

Mainly improved readability of the Pull-Up/-Down control block legend.
This resulted in some of the passives being moved out of the way to make
space for the legend. Also added legend that indicates which level
shifter is responsible for which IO signal, including Sync.

They were not aligned in a vertical line. For aethetic reasons this is
now fixed. :)

The GPIO extenders can set a Pull-Up/-Down resistor or do nothing. That
is not the same thing as HiZ. HiZ is only true if the level shifters are
also set to input. So P- (Pull nothing or Passive) is a better term.

This is the inital routing pass. This is the status after esden's Twitch
stream on Tuesday May 26th 2020.

Replaced nono_hana with an outlive version and made the Serial Number
box an outline. This will make the black silkscreen on white solder mask
look "right". Should still work for light silk on dark solder stop.

It was decided to be DNP for poduction, but there are still regularly questions
about it popping up. So better completely remove it.

schematics part of #165 done

Also add new footprints where necessary, fix a silkscreen bug
Layout for new components still TODO

Add manufacturer names & MPNs, remove stray wire, uppercase R in resistor values

- improve Pu/Pd marking
- fix silkscreen pin numbering on the board edge
- fix silkscreen pin numbering for the pu/pd sections on the back side

TODO: 3D model is just a placeholder, to be replaced with the correct one

…, Sync) to work with the new TVS diodes

- The ice40HX does not need power sequencing (unlike the ice40UP5K in previous revs)
- Just the FX2 needs a proper reset circuit with delay after power on
- On a brownout on the 5V rail, not only the FX2 needs a reset, but also all ICs connected to the I2C bus
- Otherwise they could be stuck in a transaction
- Switch off the 3.3V whole rail with the MAX809J reset IC to solve this
- Reset the FX2 before the 3.3V rail becomes unstable

The original idea in #165 and #135 was to reuse the 0.47 Ohms dropper resistor
we already have for the regulator as current shunt too. As the INA233 has a fixed
measurement range of +- 81.9 mV, this would allow to measure 174 mA. My initial
thought was that this is enough, as the specced load of the TPS73101 is 150 mA.

Review and experimentation has shown that the TPS73101 can be used to 350 mA in
most configurations before limiting set in, for a programmed output of 5 V I
could use it even up to 420 mA. As one of the design goals of using the INA233
is overcurrent protection, the settable range should be higher than what the
regulator can output in best case.

So the design is changed to a 0.15 Ohms current shunt and an additional 0.33 Ohms
dropper resistor in series. This gives a total 0.48 Ohms drop for the regulator
and a measurable current range to 546 mA.

For both resistors a DNPed parallel footprint is provided as before, allowing
the user to reduce the voltage drop if desired.

Allows easier experimenting with pin-in-paste for manufacturing.

Details:
* Replaced the bulk capacitance polymer capacitor with a larger
footprint version as the 6.3mm footprint is more common.
* Added a reset button that instantly resets the cirucuit. Meant also as
emergency stop. Reset will result in cutting power to the target instantly.
  * To enable reset we replaced the power supervisor chip with one that
  has a reset pin.
  * As the pullup current of the supervisor chip reset line is very low,
  we have added a capacitor parallel to the tact switch, to improve
  "wetting current" and break down contact oxides.
  * To make space for the reset button I decided to replace the SO8
  EEPROMs with TSSOP-8 packaged versions.
* While already moving things arouond I increased the gaps between the
status LEDs from 1.75mm to round 2.00mm. This should make lightpiping
easier when we design a case for the glasgow.

This will allow us to create a web between the main connector and sync
connector in the top side of the case.

The previouos WRL model was not exporting to STEP for some reason. :(

It was off by 0.1 mm before, thanks to user disasm for spotting this.

A raster of 2.54 mm is desirable for compatibility to other 2.54 mm
equipment like protoboards. Also designing addon boards is simplified
by allowing to use an imperial grid in CAD.

Also update the dimension drawings. Align the dimension drawings to
the location of pin 1 instead of the connector center, as Kicad library
connectors have their origin on pin 1 and not at the center.

…creen + reset button

Adjusted text sizes, and moved ID/Values to Fab layers.

…ackages.

… available on future revs

This should make the case design better. This is not necessarily the
final tact switch selection.

We now have through hole slots that will solder to the metal shield tabs
of the tact switch. This will securely anchor the tact switch to the
PCB.

Added copper flood fills on all PCB layers to make a more positive
anchor of the shield tab through holes to the PCB layers. Also enabled
solder paste aperture openings for the shield pads. Tested on other
projects I know that paste in hole works for these connectors.

Extended the apertures for the USB-C and Tact switch shield through
holes. This should provide a bigger amount of solder for the through
holes. (Might require additional tweaking down the road)

Now the slot width is the same 0.6mm as the USB-C connector which is
known to work even with JLCPCB. JLCPCB officially states that the slot
width should be 0.65mm, though we know they are fine with the narrower
USB-C slot too.

Addressed:
* Decreased via size under the BGA. 0.2mm drill 0.4mm pad, this
increases the clearance to the pads and is still a reasonable
requirement for most PCB houses. (PCB houses can adjust these if
necessary in most cases)
* Decreased via size under the ESD diode packs.

Disabled:
* Disabled courtyard checking, this is a guidance in the first place, also
we violate it in so many places that the DRC errors drown in the noise.
It is still good practice to respect courtyards when possible.

Not resolved:
* Pad to drill distance for the LVDS connector. To resolve it we can
either use complex pads or use the new single corner chamfered pads in
KiCad nightly. To save time I leave this issue for the very last step of
gerber generation that can be done in KiCad nightly.

The chamfered pads are made using custom shape primitives using only features from Kicad 5.1

The capacitor is currently DNP as it is currently unknown if the filter is necessary.
The resistor is the lowest value in the BOM (4r7).

- Fix incorrect F.Fab drawing
- Change mounting-pad dimensions/design

…rsion.

After testing and playing around with the small SMD tact switch we came
to the conclusion that a slightly bigger button will fit in the same
space and will give us more options. Also the longer, bigger and lower
weight tact switch will feel nicer and fit in the case better.

Also fixed up the silkscreen and fab layers.

…ane below voltage regulators

The reset button had to be TH. Logos should be virtual.

The footprint in the KiCad library works but it is too large and could
cause assembly reliability issues. The new footprint and 3D model are
based on the official Diodes Inc data and match the part we are using.

The outer pads of the resistor pack footprints were slightly too small.
This can cause assembly reliability isues.

As recommended by KiCad this setting should only be used when explicitly
asked by the PCB manufacturer. It depends on their needs and
capabilities and is usually done as part of gerber file pre processing
done by the PCB manufacturer.

Thanks @gregdavill for spotting & reporting this.