MIPS-single-cycle-verilog

Ferdowsi University of Mashhad Computer Architecture Single Cycle MIPS Processor

Table of Contents

1. About The Project
   • Built With
2. Getting Started
   • Prerequisites
   • Installation
3. Usage
4. Roadmap
5. Contributing
6. License
7. Contact
8. Acknowledgments

About The Project

Built With

Technologies and Tools Utilized in this Project

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Contributing

Contributions are what make the open source community such an amazing place to learn, inspire, and create. Any contributions you make are greatly appreciated.

If you have a suggestion that would make this better, please fork the repo and create a pull request. You can also simply open an issue with the tag "enhancement". Don't forget to give the project a star! Thanks again!

1. Fork the Project
2. Create your Feature Branch (git checkout -b feature/AmazingFeature)
3. Commit your Changes (git commit -m 'Add some AmazingFeature')
4. Push to the Branch (git push origin feature/AmazingFeature)
5. Open a Pull Request

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License

Distributed under the MIT License. See LICENSE for more information.

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Contact

Javid Chaji - @JavidChaji - javid.chaji@gmail.com

Project Link: https://github.com/JavidChaji/FUM-Computer-Architecture-Single-Cycle-MIPS-Processor

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Acknowledgments

• Choose an Open Source License
• GitHub Emoji Cheat Sheet
• Malven's Flexbox Cheatsheet
• Malven's Grid Cheatsheet
• Img Shields
• GitHub Pages
• Font Awesome
• React Icons

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