Add WQFN-20 package for ON Semi FXMA108BQX.

[awygle]

Add WQFN-20 package for ON Semi FXMA108BQX IC.

Datasheet: https://www.mouser.com/ds/2/149/FXMA108-1010351.pdf
Package Document: http://www.onsemi.com/pub/Collateral/510CD.PDF
Symbol PR: KiCad/kicad-symbols#461

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Thanks for creating a pull request to contribute to the KiCad libraries! To speed up integration of your PR, please check the following items:

• Provide a URL to a datasheet for the footprint(s) you are contributing
• An example screenshot image is very helpful
• If there are matching symbol or 3D model pull requests, provide link(s) as appropriate
• Check the output of the Travis automated check scripts - fix any errors as required

[CLAassistant]

All committers have signed the CLA.

[Ratfink]

Thank you for making this first contribution to the kicad-footprints library!

There are some changes I'd like to have made before this can be merged:

• The footprint name should be WQFN-20-1EP_2.5x4.5mm_P0.5mm_EP1x2.9mm. The number of EPs should be listed after the pin number and the EP dimensions in the name should be for the pad on the footprint, not on the chip itself. The dimensions should be listed with X first.
• The EP is currently very slightly off-center. Please center it on the origin.
• The EP should have paste coverage of 50-80%. See the part of F6.3 about custom stencil openings for information on how to achieve this.
• The courtyard clearance is 0.05 mm too big on the left and right (F5.3). The courtyard rectangle should be 4x6mm overall for this part (unusually round dimensions!).
• The F.Fab reference designator should be oriented 0°, and scaled down to fit inside the body outline (F5.2).
• The value text should be set back to the default size and orientation, and moved to the bottom of the footprint.
• The silkscreen reference designator should be moved to the top of the footprint.
• The silkscreen outline needs some improvement. Rules for it are at F5.1.
  • It should outline the body rectangle, not the courtyard rectangle. The final silkscreen outline for this part should consist of marks at the corners, like the other QFN parts in the library. The lines should ideally have an offset of 0.11 or 0.12 mm from the body outline (but don't follow the chamfer at the pin 1 corner). The line next to pin 1 should be removed, to act as a pin 1 indicator, leaving 7 silkscreen lines in total.

Finally, once everything looks good with this footprint, if you'd like, it would be great if you could make a second version of this footprint with thermal vias. Totally up to you if you want to or not.

[awygle]

I have some responses to some of these comments. Note that these are not me refusing to make these changes, or complaining about the feedback, but rather suggestions for how the KLC could be improved (is there a place to make PRs against the conventions?)

• The footprint name should be WQFN-20-1EP_2.5x4.5mm_P0.5mm_EP1x2.9mm. The number of EPs should be listed after the pin number and the EP dimensions in the name should be for the pad on the footprint, not on the chip itself. The dimensions should be listed with X first.

The KLC says in F2.2: "If there is more than one exposed pad, prepend with the pad count" (emphasis mine). The KLC doesn't say anywhere that the footprint dimensions should be used rather than those of the part. I'm guessing you're looking at F3.3 here but it's unclear how F3.3 and F2.2 are intended to interact.

• The F.Fab reference designator should be oriented 0°, and scaled down to fit inside the body outline (F5.2).

The KLC says in F5.2: "Orientation of RefDes should match major component axis", but the term "major component axis" is never defined.

• The silkscreen reference designator should be moved to the top of the footprint.

Section F5.1 of the KLC says "Reference Designator must be drawn on F.SilkS layer" but does not specify location (nor, indeed, orientation).

• The silkscreen outline needs some improvement. Rules for it are at F5.1.

Section F5.1 of the KLC does not even specify a requirement for a silkscreen outline, much less what form it should take. In my opinion it should at a minimum specify the requirements for a Pin 1 indicator.

For this piece of feedback in particular, if you could point me at a component to use as a reference, that would be helpful - I actually copied this "two lines, one line longer than the other" format from another component.

[Ratfink]

You're absolutely right, there are quite a few changes that we need to make in KLC. Right now we're busy trying to get the library in shape for the upcoming 5.0 release, so some things have fallen back a bit. The KLC sources are in the kicad-website repository, but I don't know if we'll be working on KLC soon or not. Also, I'm not sure if library team actually has write access to that repository.

Some of the things I suggested above (like refdes and value positions) aren't requirements from KLC, they're just de facto standards that you'll find in most footprints, so I'd like to stay consistent with those unless there's a specific reason to do otherwise. You're absolutely right that more examples of pin-1 marks for different types of component would be a great addition to KLC. Detailed information about naming for this type of part can be found in F3.4, under the No-Lead Packages heading. I agree that the combination of sections F2 and F3 is not one of the clearest parts of KLC, especially to newcomers.

QFN-28-1EP_4x4mm_P0.45mm_EP2.25x2.25mm is a good example of the kind silkscreen I'm describing. You'll find that nearly all the QFNs in the library use this style, with an outline at the corners, removed at pin 1. Since pin 1 is at the top of this part, the line on the top next to pin 1 should be removed, rather than the one on the left. The style you used looks like a DFN, which can usually have silkscreen lines close to the chip body all the way across the top and bottom because they don't have pins on those sides.

[awygle]

All of the above changes have been made.

[Ratfink]

Looks great, thanks for making the changes! The one thing I'd like to suggest is that you change the silkscreen line width to 0.12 mm (0.15 mm is for low density designs, and I don't think I could call a 0.5-mm-pitch QFN a low density part). The lines extend a bit closer towards the pads than KLC currently says they should, but we're planning on reducing the required clearance in KLC to [the silkscreen line width used in the footprint], so it's not a problem.

Once that's done, would you like to make a _ThermalVias version or should I merge this PR with just the one footprint?

[awygle]

I shrank the lines. Because there's no manufacturer recommendation for thermal vias in the datasheet, I'd rather not create a thermal via version of the footprint - please go ahead and merge with just the one.

[Ratfink]

Thanks for the good work!