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Hmm, I don't understand why the center was calculated as not being at the origin here. I measure all units as being as close as possible to centered without placing pins off the 0.1 grid. I could add blank space to center them exactly I suppose but I didn't think I was being asked to do that previously... |
I figured it out. The center check is based on pins and only on pins - I was centering based on the yellow box (which makes a lot more sense to me, but oh well). The only Travis failure now is the lack of the footprint, which is because KiCad/kicad-footprints#693 hasn't been merged yet. |
Again, just a reminder this PR still exists - is someone available to review it? @evanshultz ? |
The footprint has been merged and the symbol passes all checks. |
Friendly ping! |
@evanshultz ping! :) |
Why am I getting blamed for so much lately!? :) Centering isn't something we place high importance on and it is true that the algorithm is quite weak. Centering on the symbol outline is fine and I prefer that over just the pins for this symbol.
I'll check the footprint filter tomorrow. Sorry I'm out of time today. |
Yeah, that footprint looks good to me. So please update the footprint filter as mentioned above. |
Done.
Done.
Changed.
Fixed.
The SPI pins are in their own bank and have a separate VCCIO. I guess they could be in another unit entirely.
There's a lot of BGA footprints with "NSMD" in the name. Is this really relevant to this symbol PR? Seems like it'd be a separate bulk change.
Changed. |
I didn't catch that the SPI pins had their own supply. The unit body sizes need to change to put the now-150mil pins on grid but I think that's it. |
Done. |
Thanks once again! And apologies for taking so long to get to some PRs, like this one. |
Add iCE40HX-BG121 symbol.
Documentation is found at http://www.latticesemi.com/Products/FPGAandCPLD/iCE40, datasheet is http://www.latticesemi.com/view_document?document_id=49312.
Images:
Footprint PR: KiCad/kicad-footprints#693
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