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Remap respberrypi gpio template and use pin header fp from new lib.
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poeschlr committed Jan 27, 2018
1 parent 374343e commit 7b847a8
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137 changes: 83 additions & 54 deletions raspberrypi-gpio/raspberrypi-gpio-cache.lib
Original file line number Diff line number Diff line change
@@ -1,13 +1,80 @@
EESchema-LIBRARY Version 2.3
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# +3V3
# Connector_Generic:Conn_02x13_Odd_Even
#
DEF +3V3 #PWR 0 0 Y Y 1 F P
DEF Connector_Generic:Conn_02x13_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 700 50 H V C CNN
F1 "Connector_Generic:Conn_02x13_Odd_Even" 50 -700 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 650 150 -650 1 1 10 f
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
S 150 605 100 595 1 1 6 N
X Pin_1 1 -200 600 150 R 50 50 1 1 P
X Pin_10 10 300 200 150 L 50 50 1 1 P
X Pin_11 11 -200 100 150 R 50 50 1 1 P
X Pin_12 12 300 100 150 L 50 50 1 1 P
X Pin_13 13 -200 0 150 R 50 50 1 1 P
X Pin_14 14 300 0 150 L 50 50 1 1 P
X Pin_15 15 -200 -100 150 R 50 50 1 1 P
X Pin_16 16 300 -100 150 L 50 50 1 1 P
X Pin_17 17 -200 -200 150 R 50 50 1 1 P
X Pin_18 18 300 -200 150 L 50 50 1 1 P
X Pin_19 19 -200 -300 150 R 50 50 1 1 P
X Pin_2 2 300 600 150 L 50 50 1 1 P
X Pin_20 20 300 -300 150 L 50 50 1 1 P
X Pin_21 21 -200 -400 150 R 50 50 1 1 P
X Pin_22 22 300 -400 150 L 50 50 1 1 P
X Pin_23 23 -200 -500 150 R 50 50 1 1 P
X Pin_24 24 300 -500 150 L 50 50 1 1 P
X Pin_25 25 -200 -600 150 R 50 50 1 1 P
X Pin_26 26 300 -600 150 L 50 50 1 1 P
X Pin_3 3 -200 500 150 R 50 50 1 1 P
X Pin_4 4 300 500 150 L 50 50 1 1 P
X Pin_5 5 -200 400 150 R 50 50 1 1 P
X Pin_6 6 300 400 150 L 50 50 1 1 P
X Pin_7 7 -200 300 150 R 50 50 1 1 P
X Pin_8 8 300 300 150 L 50 50 1 1 P
X Pin_9 9 -200 200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power:+3V3
#
DEF power:+3V3 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F1 "power:+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
Expand All @@ -17,13 +84,13 @@ X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# +5V
# power:+5V
#
DEF +5V #PWR 0 0 Y Y 1 F P
DEF power:+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F1 "power:+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
Expand All @@ -32,51 +99,13 @@ X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# CONN_13X2
#
DEF CONN_13X2 P 0 10 Y N 1 F N
F0 "P" 0 700 60 H V C CNN
F1 "CONN_13X2" 0 0 50 V V C CNN
F2 "" 0 0 60 H I C CNN
F3 "" 0 0 60 H I C CNN
DRAW
S -100 650 100 -650 0 1 0 N
X P1 1 -400 600 300 R 40 30 1 1 P I
X P2 2 400 600 300 L 40 30 1 1 P I
X P3 3 -400 500 300 R 40 30 1 1 P I
X P4 4 400 500 300 L 40 30 1 1 P I
X P5 5 -400 400 300 R 40 30 1 1 P I
X P6 6 400 400 300 L 40 30 1 1 P I
X P7 7 -400 300 300 R 40 30 1 1 P I
X P8 8 400 300 300 L 40 30 1 1 P I
X P9 9 -400 200 300 R 40 30 1 1 P I
X P10 10 400 200 300 L 40 30 1 1 P I
X P20 20 400 -300 300 L 40 30 1 1 P I
X P11 11 -400 100 300 R 40 30 1 1 P I
X P21 21 -400 -400 300 R 40 30 1 1 P I
X P12 12 400 100 300 L 40 30 1 1 P I
X P22 22 400 -400 300 L 40 30 1 1 P I
X P13 13 -400 0 300 R 40 30 1 1 P I
X P23 23 -400 -500 300 R 40 30 1 1 P I
X P14 14 400 0 300 L 40 30 1 1 P I
X P20 24 400 -500 300 L 40 30 1 1 P I
X P15 15 -400 -100 300 R 40 30 1 1 P I
X P24 25 -400 -600 300 R 40 30 1 1 P I
X P16 16 400 -100 300 L 40 30 1 1 P I
X P22 26 400 -600 300 L 40 30 1 1 P I
X P17 17 -400 -200 300 R 40 30 1 1 P I
X P18 18 400 -200 300 L 40 30 1 1 P I
X P19 19 -400 -300 300 R 40 30 1 1 P I
ENDDRAW
ENDDEF
#
# GND
# power:GND
#
DEF GND #PWR 0 0 Y Y 1 F P
DEF power:GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
F1 "power:GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
Expand Down
109 changes: 58 additions & 51 deletions raspberrypi-gpio/raspberrypi-gpio.kicad_pcb
Original file line number Diff line number Diff line change
@@ -1,9 +1,6 @@
(kicad_pcb (version 4) (host pcbnew 4.0.5)
(kicad_pcb (version 20171130) (host pcbnew no-vcs-found-c6d0075~61~ubuntu16.04.1)

(general
(links 0)
(no_connects 0)
(area 143.424999 124.924999 228.575001 181.075001)
(thickness 1.6)
(drawings 41)
(tracks 0)
Expand Down Expand Up @@ -65,6 +62,9 @@
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions true)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer true)
(linewidth 0.150000)
(plotframeref false)
Expand All @@ -74,7 +74,6 @@
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
Expand Down Expand Up @@ -161,85 +160,93 @@
(uvia_drill 0.1)
)

(module Pin_Headers:Pin_Header_Straight_2x13 locked (layer F.Cu) (tedit 584FB37B) (tstamp 584FB325)
(module Connector_PinHeader_2.54mm:PinHeader_2x13_P2.54mm_Vertical locked (layer F.Cu) (tedit 59FED5CC) (tstamp 5A6DBEA3)
(at 145.75536 130.27914 90)
(descr "Through hole pin header")
(tags "pin header")
(descr "Through hole straight pin header, 2x13, 2.54mm pitch, double rows")
(tags "Through hole pin header THT 2x13 2.54mm double row")
(path /50A55ABA)
(fp_text reference P1 (at 1.5875 32.6136 90) (layer F.SilkS)
(fp_text reference P1 (at 1.27 32.80664 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_13X2 (at -2.37998 16.29664 180) (layer F.Fab)
(fp_text value CONN_13X2 (at 1.27 32.81 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 32.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 32.25) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.Fab) (width 0.1))
(fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 31.75) (end -1.27 0) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.33 31.81) (end 3.87 31.81) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 31.81) (layer F.SilkS) (width 0.12))
(fp_line (start 3.87 -1.33) (end 3.87 31.81) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.8 -1.8) (end -1.8 32.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 32.25) (end 4.35 32.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.35 32.25) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 1.27 15.24 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 3 +3V3))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 +5V))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 "/GPIO0(SDA)"))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 5 "Net-(P1-Pad4)"))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 6 "/GPIO1(SCL)"))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 GND))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 /GPIO4))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 8 /TXD))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 9 "Net-(P1-Pad9)"))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 10 /RXD))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 11 /GPIO17))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 12 /GPIO18))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 13 /GPIO21))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 14 "Net-(P1-Pad14)"))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 15 /GPIO22))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 16 /GPIO23))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 17 "Net-(P1-Pad17)"))
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 18 /GPIO24))
(pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 19 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 19 "/GPIO10(MOSI)"))
(pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 20 "Net-(P1-Pad20)"))
(pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 21 thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 21 "/GPIO9(MISO)"))
(pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 22 /GPIO25))
(pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 23 thru_hole oval (at 0 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 23 "/GPIO11(SCLK)"))
(pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 24 "/GPIO8(CE0)"))
(pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 25 thru_hole oval (at 0 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 25 "Net-(P1-Pad25)"))
(pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 26 "/GPIO7(CE1)"))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl
(at (xyz 0.05 -0.6 0))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x13_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
(rotate (xyz 0 0 0))
)
)

Expand Down
24 changes: 1 addition & 23 deletions raspberrypi-gpio/raspberrypi-gpio.pro
100644 → 100755
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
update=13/12/2016 09:33:12
update=Sam 27 Jän 2018 23:27:50 CET
version=1
last_client=kicad
[cvpcb]
Expand Down Expand Up @@ -82,25 +82,3 @@ version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=opto
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