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Merge pull request #2646 from Kwiboo/rockchip-part6
Rockchip: update linux and some packages
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31 changes: 31 additions & 0 deletions
31
packages/multimedia/rkmpp/patches/rkmpp-0002-disable-unit-tests-by-default.patch
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,31 @@ | ||
From e2a70002f9a0a37f5c6297f1cc5e6604e9f9d964 Mon Sep 17 00:00:00 2001 | ||
From: Jonas Karlman <jonas@kwiboo.se> | ||
Date: Sun, 24 Jun 2018 11:07:44 +0200 | ||
Subject: [PATCH] disable unit tests by default | ||
|
||
--- | ||
test/CMakeLists.txt | 4 ++-- | ||
1 file changed, 2 insertions(+), 2 deletions(-) | ||
|
||
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt | ||
index 257a3efa..961086ae 100644 | ||
--- a/test/CMakeLists.txt | ||
+++ b/test/CMakeLists.txt | ||
@@ -10,7 +10,7 @@ macro(add_mpp_test module) | ||
#message(STATUS "test_name : ${test_name}") | ||
#message(STATUS "test_tag : ${test_tag}") | ||
|
||
- option(${test_tag} "Build mpp ${module} unit test" ON) | ||
+ option(${test_tag} "Build mpp ${module} unit test" OFF) | ||
if(${test_tag}) | ||
add_executable(${test_name} ${test_name}.c mpp_event_trigger.c mpp_parse_cfg.c) | ||
target_link_libraries(${test_name} ${MPP_SHARED} utils) | ||
@@ -54,7 +54,7 @@ macro(add_legacy_test module) | ||
#message(STATUS "test_name : ${test_name}") | ||
#message(STATUS "test_tag : ${test_tag}") | ||
|
||
- option(${test_tag} "Build legacy ${module} unit test" ON) | ||
+ option(${test_tag} "Build legacy ${module} unit test" OFF) | ||
if(${test_tag}) | ||
add_executable(${test_name} ${test_name}.c) | ||
target_link_libraries(${test_name} ${VPU_SHARED} utils) |
25 changes: 0 additions & 25 deletions
25
...es/multimedia/rkmpp/patches/rkmpp-0002-mpp_dec-sleep-when-there-is-nothing-to-parse.patch
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140 changes: 140 additions & 0 deletions
140
packages/multimedia/rkmpp/patches/rkmpp-0003-h264d-revert-vdpu-fast-mode-code.patch
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@@ -0,0 +1,140 @@ | ||
From ccd837fab6ab41ee3cb63b0e9ae1db824f96d4dc Mon Sep 17 00:00:00 2001 | ||
From: Jonas Karlman <jonas@kwiboo.se> | ||
Date: Tue, 7 Aug 2018 18:14:57 +0200 | ||
Subject: [PATCH] [h264d]: revert vdpu fast mode code | ||
|
||
--- | ||
mpp/hal/rkdec/h264d/hal_h264d_vdpu1.c | 18 +++++------------- | ||
mpp/hal/rkdec/h264d/hal_h264d_vdpu2.c | 18 +++++------------- | ||
2 files changed, 10 insertions(+), 26 deletions(-) | ||
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||
diff --git a/mpp/hal/rkdec/h264d/hal_h264d_vdpu1.c b/mpp/hal/rkdec/h264d/hal_h264d_vdpu1.c | ||
index 1cddfc45..660e41f3 100644 | ||
--- a/mpp/hal/rkdec/h264d/hal_h264d_vdpu1.c | ||
+++ b/mpp/hal/rkdec/h264d/hal_h264d_vdpu1.c | ||
@@ -416,7 +416,8 @@ static MPP_RET vdpu1_set_vlc_regs(H264dHalCtx_t *p_hal, | ||
//!< set poc to buffer | ||
{ | ||
H264dVdpuRegCtx_t *reg_ctx = (H264dVdpuRegCtx_t *)p_hal->reg_ctx; | ||
- RK_U32 *pocBase = (RK_U32 *)mpp_buffer_get_ptr(reg_ctx->poc_buf); | ||
+ RK_U32 *pocBase = (RK_U32 *)((RK_U8 *)mpp_buffer_get_ptr(reg_ctx->cabac_buf) | ||
+ + VDPU_CABAC_TAB_SIZE); | ||
|
||
//!< set reference reorder poc | ||
for (i = 0; i < 32; i++) { | ||
@@ -620,7 +621,8 @@ static MPP_RET vdpu1_set_asic_regs(H264dHalCtx_t *p_hal, | ||
H264dVdpuRegCtx_t *reg_ctx = (H264dVdpuRegCtx_t *)p_hal->reg_ctx; | ||
if (p_hal->pp->scaleing_list_enable_flag) { | ||
RK_U32 temp = 0; | ||
- RK_U32 *ptr = (RK_U32 *)mpp_buffer_get_ptr(reg_ctx->sclst_buf); | ||
+ RK_U32 *ptr = (RK_U32 *)((RK_U8 *)mpp_buffer_get_ptr(reg_ctx->cabac_buf) | ||
+ + VDPU_CABAC_TAB_SIZE + VDPU_POC_BUF_SIZE); | ||
|
||
for (i = 0; i < 6; i++) { | ||
for (j = 0; j < 4; j++) { | ||
@@ -722,21 +724,15 @@ MPP_RET vdpu1_h264d_init(void *hal, MppHalCfg *cfg) | ||
H264dVdpuRegCtx_t *reg_ctx = (H264dVdpuRegCtx_t *)p_hal->reg_ctx; | ||
//!< malloc buffers | ||
FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, | ||
- ®_ctx->cabac_buf, VDPU_CABAC_TAB_SIZE)); | ||
+ ®_ctx->cabac_buf, VDPU_CABAC_TAB_SIZE + VDPU_POC_BUF_SIZE + VDPU_SCALING_LIST_SIZE)); | ||
RK_U32 i = 0; | ||
RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; | ||
for (i = 0; i < loop; i++) { | ||
reg_ctx->reg_buf[i].regs = mpp_calloc_size(void, sizeof(H264dVdpu1Regs_t)); | ||
- FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, | ||
- ®_ctx->reg_buf[i].poc, VDPU_POC_BUF_SIZE)); | ||
- FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, | ||
- ®_ctx->reg_buf[i].sclst, VDPU_SCALING_LIST_SIZE)); | ||
} | ||
|
||
if (!p_hal->fast_mode) { | ||
reg_ctx->regs = reg_ctx->reg_buf[0].regs; | ||
- reg_ctx->poc_buf = reg_ctx->reg_buf[0].poc; | ||
- reg_ctx->sclst_buf = reg_ctx->reg_buf[0].sclst; | ||
} | ||
//!< copy cabac table bytes | ||
FUN_CHECK(ret = mpp_buffer_write(reg_ctx->cabac_buf, 0, | ||
@@ -771,8 +767,6 @@ MPP_RET vdpu1_h264d_deinit(void *hal) | ||
RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; | ||
for (i = 0; i < loop; i++) { | ||
MPP_FREE(reg_ctx->reg_buf[i].regs); | ||
- mpp_buffer_put(reg_ctx->reg_buf[i].poc); | ||
- mpp_buffer_put(reg_ctx->reg_buf[i].sclst); | ||
} | ||
mpp_buffer_put(reg_ctx->cabac_buf); | ||
MPP_FREE(p_hal->reg_ctx); | ||
@@ -809,8 +803,6 @@ MPP_RET vdpu1_h264d_gen_regs(void *hal, HalTaskInfo *task) | ||
for (i = 0; i < MPP_ARRAY_ELEMS(reg_ctx->reg_buf); i++) { | ||
if (!reg_ctx->reg_buf[i].valid) { | ||
task->dec.reg_index = i; | ||
- reg_ctx->poc_buf = reg_ctx->reg_buf[i].poc; | ||
- reg_ctx->sclst_buf = reg_ctx->reg_buf[i].sclst; | ||
reg_ctx->regs = reg_ctx->reg_buf[i].regs; | ||
reg_ctx->reg_buf[i].valid = 1; | ||
break; | ||
diff --git a/mpp/hal/rkdec/h264d/hal_h264d_vdpu2.c b/mpp/hal/rkdec/h264d/hal_h264d_vdpu2.c | ||
index fa55e635..9b22c1d9 100644 | ||
--- a/mpp/hal/rkdec/h264d/hal_h264d_vdpu2.c | ||
+++ b/mpp/hal/rkdec/h264d/hal_h264d_vdpu2.c | ||
@@ -451,7 +451,8 @@ static MPP_RET set_vlc_regs(H264dHalCtx_t *p_hal, H264dVdpuRegs_t *p_regs) | ||
//!< set poc to buffer | ||
{ | ||
H264dVdpuRegCtx_t *reg_ctx = (H264dVdpuRegCtx_t *)p_hal->reg_ctx; | ||
- RK_U32 *ptr = (RK_U32 *)mpp_buffer_get_ptr(reg_ctx->poc_buf); | ||
+ RK_U32 *ptr = (RK_U32 *)((RK_U8 *)mpp_buffer_get_ptr(reg_ctx->cabac_buf) | ||
+ + VDPU_CABAC_TAB_SIZE); | ||
//!< set reference reorder poc | ||
for (i = 0; i < 32; i++) { | ||
if (pp->RefFrameList[i / 2].bPicEntry != 0xff) { | ||
@@ -636,7 +637,8 @@ static MPP_RET set_asic_regs(H264dHalCtx_t *p_hal, H264dVdpuRegs_t *p_regs) | ||
H264dVdpuRegCtx_t *reg_ctx = (H264dVdpuRegCtx_t *)p_hal->reg_ctx; | ||
if (p_hal->pp->scaleing_list_enable_flag) { | ||
RK_U32 temp = 0; | ||
- RK_U32 *ptr = (RK_U32 *)mpp_buffer_get_ptr(reg_ctx->cabac_buf); | ||
+ RK_U32 *ptr = (RK_U32 *)((RK_U8 *)mpp_buffer_get_ptr(reg_ctx->cabac_buf) | ||
+ + VDPU_CABAC_TAB_SIZE + VDPU_POC_BUF_SIZE); | ||
|
||
for (i = 0; i < 6; i++) { | ||
for (j = 0; j < 4; j++) { | ||
@@ -686,21 +688,15 @@ MPP_RET vdpu2_h264d_init(void *hal, MppHalCfg *cfg) | ||
H264dVdpuRegCtx_t *reg_ctx = (H264dVdpuRegCtx_t *)p_hal->reg_ctx; | ||
//!< malloc buffers | ||
FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, | ||
- ®_ctx->cabac_buf, VDPU_CABAC_TAB_SIZE)); | ||
+ ®_ctx->cabac_buf, VDPU_CABAC_TAB_SIZE + VDPU_POC_BUF_SIZE + VDPU_SCALING_LIST_SIZE)); | ||
RK_U32 i = 0; | ||
RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; | ||
for (i = 0; i < loop; i++) { | ||
reg_ctx->reg_buf[i].regs = mpp_calloc_size(void, sizeof(H264dVdpuRegs_t)); | ||
- FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, | ||
- ®_ctx->reg_buf[i].poc, VDPU_POC_BUF_SIZE)); | ||
- FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, | ||
- ®_ctx->reg_buf[i].sclst, VDPU_SCALING_LIST_SIZE)); | ||
} | ||
|
||
if (!p_hal->fast_mode) { | ||
reg_ctx->regs = reg_ctx->reg_buf[0].regs; | ||
- reg_ctx->poc_buf = reg_ctx->reg_buf[0].poc; | ||
- reg_ctx->sclst_buf = reg_ctx->reg_buf[0].sclst; | ||
} | ||
//!< copy cabac table bytes | ||
FUN_CHECK(ret = mpp_buffer_write(reg_ctx->cabac_buf, 0, | ||
@@ -735,8 +731,6 @@ MPP_RET vdpu2_h264d_deinit(void *hal) | ||
RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; | ||
for (i = 0; i < loop; i++) { | ||
MPP_FREE(reg_ctx->reg_buf[i].regs); | ||
- mpp_buffer_put(reg_ctx->reg_buf[i].poc); | ||
- mpp_buffer_put(reg_ctx->reg_buf[i].sclst); | ||
} | ||
mpp_buffer_put(reg_ctx->cabac_buf); | ||
MPP_FREE(p_hal->reg_ctx); | ||
@@ -773,8 +767,6 @@ MPP_RET vdpu2_h264d_gen_regs(void *hal, HalTaskInfo *task) | ||
for (i = 0; i < MPP_ARRAY_ELEMS(reg_ctx->reg_buf); i++) { | ||
if (!reg_ctx->reg_buf[i].valid) { | ||
task->dec.reg_index = i; | ||
- reg_ctx->poc_buf = reg_ctx->reg_buf[i].poc; | ||
- reg_ctx->sclst_buf = reg_ctx->reg_buf[i].sclst; | ||
reg_ctx->regs = reg_ctx->reg_buf[i].regs; | ||
reg_ctx->reg_buf[i].valid = 1; | ||
break; |
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