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Releases: MattiaDif/closed-loop-neuroengineering

closed-loop-neuroengineering v0.2

18 Sep 07:53
@MattiaDif MattiaDif
v0.2
5509992
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closed-loop-neuroengineering v0.2 Latest
Latest
  • Example folder (model example without pipe in communication), Example_pipein folder (model example with pipe in communication)
  • Simulink_lib --> custom Simulink library with the following blocks for the model design: input_interpret_store_retrieve, output_interpret_collect_output, processing_output_logic, Butter_1st_HP, Butter_2nd_HP, refractory_period, spike_check, refractory_period_pipe_in, LocalMaxima, HardThreshold, LocalMaxima_pipein, HardThreshold_pipein, interpret_pipe_in
  • Source code: IntanStimRecordController (C++/Qt source code for the GUI customization), RhythmStimAPI_Verilog_Custom (Intan RHS Stim/Recording System Verilog code modification), fixed_point_converter.m (script for the conversion in fixed-point of the subsystem), fsm_dataflow.m (script to generate input file for the custom architecture model simulation in Simulink)
  • Custom GUI: ready-to-use GUI customized with cst_enable flag and Load Configuration File action
  • Videoguide: video about how to develop your closed-loop algorithm from model design to FPGA implementation
Assets 2

closed-loop-neuroengineering v0.1

15 Dec 08:47
@MattiaDif MattiaDif
v0.1
b4f2578
This commit was created on GitHub.com and signed with GitHub’s verified signature. The key has expired.
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closed-loop-neuroengineering v0.1 Pre-release
Pre-release
  • Example folder (model example without pipe in communication), Example_pipein folder (model example with pipe in communication)
  • Simulink_lib --> custom Simulink library with the following blocks for the model design: input_interpret_store_retrieve, output_interpret_collect_output, processing_output_logic, Butter_1st_HP, Butter_2nd_HP, refractory_period, spike_check, refractory_period_pipe_in, LocalMaxima, HardThreshold, LocalMaxima_pipein, HardThreshold_pipein, interpret_pipe_in
  • Source code: IntanStimRecordController (C++/Qt source code for the GUI customization), RhythmStimAPI_Verilog_Custom (Intan RHS Stim/Recording System Verilog code modification), fixed_point_converter.m (script for the conversion in fixed-point of the subsystem), fsm_dataflow.m (script to generate input file for the custom architecture model simulation in Simulink)
  • Custom GUI: ready-to-use GUI customized with cst_enable flag and Load Configuration File action
  • Videoguide: video about how to develop your closed-loop algorithm from model design to FPGA implementation
Assets 2