Merge pull request MiSTer-devel#310 from Kitrinx/mmc3_filter

PPU Fix, Update mappers (changes from upstream commit 78f5b59)
MiSTer-unstable-nightlies · Apr 17, 2022 · 175e156 · 175e156
2 parents ad702f5 + 78f5b59
commit 175e156
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Showing 9 changed files with 331 additions and 297 deletions.
diff --git a/rtl/cart.sv b/rtl/cart.sv
@@ -17,10 +17,10 @@
 
 module cart_top (
 	input             clk,
-	input             ce,
-	input             ppu_ce,
+	input             ce,             // M2
+	input             cpu_ce,         // CPU Phi1 clock (several mappers use m2 inverted)
+	input             paused,         // This indicates the core is paused so anything using the master clock won't get messed up
 	input             reset,
-	input      [19:0] ppuflags,       // Misc flags from PPU for MMC5 cheating
 	input      [63:0] flags,          // Misc flags from ines header {prg_size(3), chr_size(3), mapper(8)}
 	input      [15:0] prg_ain,        // Better known as "CPU Address in"
 	output reg [24:0] prg_aout,       // PRG Input / Output Address Lines ([25:22] extended Lines [Misc ROM])
@@ -277,7 +277,7 @@ Mapper32 map32(
 //*****************************************************************************//
 MMC2 mmc2(
 	.clk        (clk),
-	.ce         (ppu_ce), // PPU_CE
+	.ce         (ce),
 	.enable     (me[9]),
 	.flags      (flags),
 	.prg_ain    (prg_ain),
@@ -299,6 +299,7 @@ MMC2 mmc2(
 	.audio_b    (audio_out_b),
 	// Special ports
 	.chr_ain_o  (chr_ain_orig),
+	.paused     (paused),
 	// savestates
 	.SaveStateBus_Din  (SaveStateBus_Din ), 
 	.SaveStateBus_Adr  (SaveStateBus_Adr ),
@@ -322,7 +323,7 @@ wire mmc3_en = me[118] | me[119] | me[47] | me[206] | me[112] | me[88] | me[154]
 
 MMC3 mmc3 (
 	.clk        (clk),
-	.ce         (ppu_ce), // PPU CE
+	.ce         (ce),
 	.enable     (mmc3_en),
 	.flags      (flags),
 	.prg_ain    (prg_ain),
@@ -344,6 +345,8 @@ MMC3 mmc3 (
 	.audio_b    (audio_out_b),
 	// Special ports
 	.chr_ain_o  (chr_ain_orig),
+	.m2_inv     (cpu_ce),
+	.paused     (paused),
 	// savestates
 	.SaveStateBus_Din  (SaveStateBus_Din ), 
 	.SaveStateBus_Adr  (SaveStateBus_Adr ),
@@ -362,7 +365,7 @@ MMC3 mmc3 (
 //*****************************************************************************//
 MMC4 mmc4(
 	.clk        (clk),
-	.ce         (ppu_ce), // PPU_CE
+	.ce         (ce),
 	.enable     (me[10]),
 	.flags      (flags),
 	.prg_ain    (prg_ain),
@@ -384,6 +387,7 @@ MMC4 mmc4(
 	.audio_b    (audio_out_b),
 	// Special ports
 	.chr_ain_o  (chr_ain_orig),
+	.paused     (paused),
 	// savestates
 	.SaveStateBus_Din  (SaveStateBus_Din ), 
 	.SaveStateBus_Adr  (SaveStateBus_Adr ),
@@ -428,7 +432,7 @@ MMC5 mmc5(
 	.chr_din    (chr_din),
 	.chr_write  (chr_write),
 	.chr_dout_b (chr_dout_b),
-	.ppu_ce     (ppu_ce),
+	.paused     (paused),
 		// savestates
 	.SaveStateBus_Din  (SaveStateBus_Din ), 
 	.SaveStateBus_Adr  (SaveStateBus_Adr ),
@@ -1221,7 +1225,7 @@ Mapper111 map111(
 //*****************************************************************************//
 Mapper165 map165(
 	.clk        (clk),
-	.ce         (ppu_ce), // PPU_CE
+	.ce         (ce),
 	.enable     (me[165]),
 	.flags      (flags),
 	.prg_ain    (prg_ain),
@@ -1242,7 +1246,9 @@ Mapper165 map165(
 	.audio_in   (audio_in),
 	.audio_b    (audio_out_b),
 	// Special ports
-	.chr_ain_o  (chr_ain_orig)
+	.chr_ain_o  (chr_ain_orig),
+	.m2_inv     (cpu_ce),
+	.paused     (paused)
 );
 
 //*****************************************************************************//
@@ -1623,7 +1629,7 @@ VRC5 vrc5(
 	.chr_din    (chr_din),
 	.chr_write  (chr_write),
 	.chr_dout_b (chr_dout_b),
-	.ppu_ce     (ppu_ce),
+	.paused     (paused),
 	// savestates
 	.SaveStateBus_Din  (SaveStateBus_Din ), 
 	.SaveStateBus_Adr  (SaveStateBus_Adr ),
@@ -1810,8 +1816,7 @@ Nanjing map163(
 	.audio_in   (audio_in),
 	.audio_b    (audio_out_b),
 	// Special Ports
-	.ppu_ce     (ppu_ce),
-	.ppuflags   (ppuflags)
+	.paused     (paused)
 );
 
 
@@ -1988,7 +1993,7 @@ JYCompany jycompany(
 	.audio_in   (audio_in),
 	.audio_b    (audio_out_b),
 	// Special ports
-	.ppu_ce     (ppu_ce),
+	.paused     (paused),
 	.chr_ain_o  (chr_ain_orig),
 	// savestates
 	.SaveStateBus_Din  (SaveStateBus_Din ), 
@@ -2075,7 +2080,7 @@ Mapper225 map225(
 //*****************************************************************************//
 Mapper413 map413 (
 	.clk        (clk),
-	.ce         (ppu_ce), // PPU CE
+	.ce         (ce),
 	.enable     (me[413]),
 	.flags      (flags),
 	.prg_ain    (prg_ain),
@@ -2097,7 +2102,9 @@ Mapper413 map413 (
 	.audio_b    (audio_out_b),
 	// Special ports
 	.chr_ain_o  (chr_ain_orig),
-	.prg_aoute  (prg_aoute_m413)
+	.prg_aoute  (prg_aoute_m413),
+	.m2_inv     (cpu_ce),
+	.paused     (paused)
 );
 
 //*****************************************************************************//

diff --git a/rtl/mappers/JYCompany.sv b/rtl/mappers/JYCompany.sv
@@ -76,7 +76,7 @@ module JYCompany(
 	inout [15:0] audio_b,     // Mixed audio output
 	inout [15:0] flags_out_b, // flags {0, 0, 0, 0, has_savestate, prg_conflict, prg_bus_write, has_chr_dout}
 	// Special ports
-	input        ppu_ce,
+	input        paused,
 	input [13:0] chr_ain_o,
 		// savestates              
 	input       [63:0]  SaveStateBus_Din,
@@ -220,7 +220,7 @@ always @(posedge clk) begin
 		endcase
 	end
 
-	if (ppu_ce) old_a12 <= chr_ain_o[12];
+	if (~paused) old_a12 <= chr_ain_o[12];
 
 	if (irq_source && irq_enable && (irq_mode[7] != irq_mode[6])) begin
 		irq_prescalar <= irq_mode[6] ? (irq_prescalar + 8'd1) : (irq_prescalar - 8'd1);
@@ -248,8 +248,8 @@ end
 always @* begin
 	case(irq_mode[1:0])
 		2'b00: irq_source = ce;
-		2'b01: irq_source = ppu_ce && chr_ain_o[12] && !old_a12;
-		2'b10: irq_source = ppu_ce && chr_read;
+		2'b01: irq_source = ~paused && chr_ain_o[12] && !old_a12;
+		2'b10: irq_source = ~paused && chr_read;
 		2'b11: irq_source = ce && prg_write;
 	endcase
 end
@@ -367,7 +367,7 @@ if (~enable) begin
 	chr_latch <= 2'b00;
 end else if (SaveStateBus_load) begin
 	chr_latch <= SS_MAP6[11:10];
-end else if (ppu_ce && chr_read) begin
+end else if (~paused && chr_read) begin
 	chr_latch[chr_ain_o[12]] <= outer_bank[7] && (((chr_ain_o & 14'h2ff8) == 14'h0fd8) ? 1'd0 : ((chr_ain_o & 14'h2ff8) == 14'h0fe8) ? 1'd1 : chr_latch[chr_ain_o[12]]);
 end
 wire [2:0] chr_reg;

diff --git a/rtl/mappers/MMC2.sv b/rtl/mappers/MMC2.sv
@@ -24,6 +24,7 @@ module MMC2(
 	inout [15:0] audio_b,     // Mixed audio output
 	inout [15:0] flags_out_b, // flags {0, 0, 0, 0, has_savestate, prg_conflict, prg_bus_write, has_chr_dout}
 	input [13:0] chr_ain_o,
+	input        paused,
 	// savestates              
 	input       [63:0]  SaveStateBus_Din,
 	input       [ 9:0]  SaveStateBus_Adr,
@@ -140,7 +141,7 @@ if (~enable) begin
 end else if (SaveStateBus_load) begin
 	latch_0 <= SS_MAP1[   25];
 	latch_1 <= SS_MAP1[   26];
-end else if (ce && chr_read) begin
+end else if (~paused && chr_read) begin
 	latch_0 <= (chr_ain_o & 14'h3fff) == 14'h0fd8 ? 1'd0 : (chr_ain_o & 14'h3fff) == 14'h0fe8 ? 1'd1 : latch_0;
 	latch_1 <= (chr_ain_o & 14'h3ff8) == 14'h1fd8 ? 1'd0 : (chr_ain_o & 14'h3ff8) == 14'h1fe8 ? 1'd1 : latch_1;
 end
@@ -220,6 +221,7 @@ module MMC4(
 	inout [15:0] audio_b,     // Mixed audio output
 	inout [15:0] flags_out_b, // flags {0, 0, 0, 0, has_savestate, prg_conflict, prg_bus_write, has_chr_dout}
 	input [13:0] chr_ain_o,
+	input        paused,
 	// savestates              
 	input       [63:0]  SaveStateBus_Din,
 	input       [ 9:0]  SaveStateBus_Adr,
@@ -334,7 +336,7 @@ always @(posedge clk)
 if (SaveStateBus_load) begin
 	latch_0 <= SS_MAP1[   25];
 	latch_1 <= SS_MAP1[   26];
-end else if (ce & chr_read) begin
+end else if (~paused & chr_read) begin
 	latch_0 <= (chr_ain_o & 14'h3ff8) == 14'h0fd8 ? 1'd0 : (chr_ain_o & 14'h3ff8) == 14'h0fe8 ? 1'd1 : latch_0;
 	latch_1 <= (chr_ain_o & 14'h3ff8) == 14'h1fd8 ? 1'd0 : (chr_ain_o & 14'h3ff8) == 14'h1fe8 ? 1'd1 : latch_1;
 end