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DMA v2.00
dma
v2.00a
Marco Forconesi (marco.forconesi_at_cl.cam.ac.uk)
pcore (HW)
lib/hw/std/pcores/dma_v2_00_a/
AXI4-Stream
AXI4-Lite
PCIe
This module is a DMA engine that interconnects the hardware systems running on the FPGA with the software components in the host computer. The DMA engine has two AXI4-Stream interfaces, one of which is a slave interface for sending packets from the card to the host and the other master interface is where packets sent by the host are received and pushed to the FPGA fabric. Packet metadata like length, time stamp, source and destination is encoded in the TUSER signal of the AXI4-Stream bus. The AXI4-Lite master interface exposes the registers of every pcore to the host in order to read and/or write them by using a user level application. A (linux) device driver running on the host works orchestrated with the DMA and is in charge of delivering and sending the packets to each interface: nf0, nf1, etc. The DMA/Driver is a research system part of the Network as a Service (NaaS) project and is currently under development. People interested should refer to the https://github.com/NetFPGA-NewNIC