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hdl: Updated FPGA version to v0.3.2
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Patch version bumped due to bug fix.
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jynik committed Jun 24, 2015
1 parent c0cbeea commit 914c8c5
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6 changes: 6 additions & 0 deletions hdl/CHANGELOG
Expand Up @@ -5,6 +5,12 @@ For more detailed information, please see the git change log and issue tracker
hosted on GitHub: https://github.com/nuand/bladeRF
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v0.3.2 (2015-06-23)
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* Fixed VCTCXO readback

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v0.3.1 (2015-06-17)
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* Added faster, custom SPI block for LMS6 communication.
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Expand Up @@ -8,7 +8,7 @@
#define FPGA_VERSION_ID 0x7777
#define FPGA_VERSION_MAJOR 0
#define FPGA_VERSION_MINOR 3
#define FPGA_VERSION_PATCH 1
#define FPGA_VERSION_PATCH 2
#define FPGA_VERSION ((uint32_t)( FPGA_VERSION_MAJOR | \
(FPGA_VERSION_MINOR << 8) | \
(FPGA_VERSION_PATCH << 16) ) )
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