Merge 416dbca into 4973e05

OFS · Dec 7, 2023 · 8247aec · 8247aec
2 parents 4973e05 + 416dbca
commit 8247aec
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Showing 3 changed files with 21 additions and 1 deletion.
diff --git a/libraries/plugins/xfpga/fpga-dfl.h b/libraries/plugins/xfpga/fpga-dfl.h
@@ -377,6 +377,7 @@ struct dfl_cxl_cache_region_info {
  */
 struct dfl_cxl_cache_buffer_map {
 	__u32 argsz;
+#define DFL_CXL_BUFFER_MAP_WRITABLE 1
 	__u32 flags;
 	__u64 user_addr;
 	__u64 length;

diff --git a/samples/cxl_host_exerciser/cxl_he_cmd.h b/samples/cxl_host_exerciser/cxl_he_cmd.h
@@ -263,6 +263,7 @@ class he_cmd : public test_command {
             he_ctl_.bias_support = FPGAMEM_HOST_BIAS;
         } else {
             he_ctl_.bias_support = FPGAMEM_DEVICE_BIAS;
+            host_exe_->set_mmap_access(HE_CACHE_DMA_MMAP_R);
         }
     }
 

diff --git a/samples/cxl_host_exerciser/he_cache_test.h b/samples/cxl_host_exerciser/he_cache_test.h
@@ -94,6 +94,11 @@ enum { MATCHES_SIZE = 6 };
 #define DFL_CXL_CACHE_WR_ADDR_TABLE_DATA 0x068
 #define DFL_CXL_CACHE_RD_ADDR_TABLE_DATA 0x088
 
+// buffer access type
+typedef enum {
+    HE_CACHE_DMA_MMAP_RW = 0x0,
+    HE_CACHE_DMA_MMAP_R = 0x1,
+} he_mmap_access;
 
 bool buffer_allocate(void** addr, uint64_t len, uint32_t numa_node)
 {
@@ -284,7 +289,7 @@ class afu {
       const char *log_level = nullptr)
       : name_(name), afu_id_(afu_id ? afu_id : ""), app_(name_), pci_addr_(""),
         log_level_(log_level ? log_level : "info"), timeout_msec_(60000),
-        current_command_(nullptr) {
+        current_command_(nullptr), dma_mmap_access_(HE_CACHE_DMA_MMAP_RW) {
     if (!afu_id_.empty())
       app_.add_option("-g,--guid", afu_id_, "GUID")->default_str(afu_id_);
     app_.add_option("-p,--pci-address", pci_addr_,
@@ -544,6 +549,7 @@ class afu {
 
     cout << "DSM buffer numa node: " << numa_node << endl;
     dma_map.argsz = sizeof(dma_map);
+    dma_map.flags = DFL_CXL_BUFFER_MAP_WRITABLE;
     dma_map.user_addr = (__u64)ptr;
     dma_map.length = len;
     dma_map.csr_array[0] = DFL_CXL_CACHE_DSM_BASE;
@@ -619,6 +625,8 @@ class afu {
     cout << "Read buffer numa node: " << numa_node << endl;
 
     dma_map.argsz = sizeof(dma_map);
+    if (dma_mmap_access_ == HE_CACHE_DMA_MMAP_RW)
+        dma_map.flags = DFL_CXL_BUFFER_MAP_WRITABLE;
     dma_map.user_addr = (__u64)ptr;
     dma_map.length = len;
     dma_map.csr_array[0] = DFL_CXL_CACHE_RD_ADDR_TABLE_DATA;
@@ -687,6 +695,8 @@ class afu {
 
     cout << "Write buffer numa node: " << numa_node << endl;
     dma_map.argsz = sizeof(dma_map);
+    if (dma_mmap_access_ == HE_CACHE_DMA_MMAP_RW)
+        dma_map.flags = DFL_CXL_BUFFER_MAP_WRITABLE;
     dma_map.user_addr = (__u64)ptr;
     dma_map.length = len;
     dma_map.csr_array[0] = DFL_CXL_CACHE_WR_ADDR_TABLE_DATA;
@@ -755,6 +765,8 @@ class afu {
     cout << "Read/Write buffer numa node: " << numa_node << endl;
 
     dma_map.argsz = sizeof(dma_map);
+    if (dma_mmap_access_ == HE_CACHE_DMA_MMAP_RW)
+        dma_map.flags = DFL_CXL_BUFFER_MAP_WRITABLE;
     dma_map.user_addr = (__u64)ptr;
     dma_map.length = len;
     dma_map.csr_array[0] = DFL_CXL_CACHE_RD_ADDR_TABLE_DATA;
@@ -838,6 +850,7 @@ class afu {
       cout << "Pinned buffer numa node: " << numa_node << endl;
 
       dma_map.argsz = sizeof(dma_map);
+      dma_map.flags = DFL_CXL_BUFFER_MAP_WRITABLE;
       dma_map.user_addr = (__u64)ptr;
       dma_map.length = len;
       dma_map.csr_array[0] = 0;
@@ -896,6 +909,9 @@ class afu {
 
   uint8_t *get_read_write() const { return rd_wr_buffer_; }
 
+  void set_mmap_access(he_mmap_access access = HE_CACHE_DMA_MMAP_RW)
+  { dma_mmap_access_ = access; }
+
 protected:
   std::string name_;
   std::string afu_id_;
@@ -927,6 +943,8 @@ class afu {
   command::ptr_t current_command_;
   std::map<CLI::App *, command::ptr_t> commands_;
 
+  he_mmap_access dma_mmap_access_;
+
 public:
   std::shared_ptr<spdlog::logger> logger_;
 };