[Review] core: ftrace: Enable user-space access to counter regs

Comments.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>

core/arch/arm/include/sm/sm.h

@@ -37,6 +37,10 @@ struct sm_unbanked_regs {
 #ifdef CFG_SM_NO_CYCLE_COUNTING
 	uint32_t pmcr;
 #endif
+#ifdef CFG_TA_FTRACE_SUPPORT
+	uint32_t cntkctl;
+	uint32_t pad;
+#endif
 };
 
 struct sm_nsec_ctx {

core/arch/arm/kernel/thread.c

@@ -1075,6 +1075,15 @@ void thread_init_per_cpu(void)
 	set_abt_stack(l, GET_STACK(stack_abt[pos]));
 
 	thread_init_vbar(get_excp_vect());
+
+#ifdef CFG_TA_FTRACE_SUPPORT
+	/*
+	 * Enable accesses to frequency register and physical counter
+	 * register in el0 mode required for timestamping during
+	 * function tracing.
+	 */
+	write_cntkctl(read_cntkctl() | CNTKCTL_PL0PCTEN);
+#endif
 }
 
 struct thread_specific_data *thread_get_tsd(void)

core/arch/arm/kernel/user_ta.c

@@ -4,7 +4,6 @@
  * Copyright (c) 2015-2017 Linaro Limited
  */
 
-#include <arm.h>
 #include <assert.h>
 #include <compiler.h>
 #include <crypto/crypto.h>
@@ -304,12 +303,6 @@ static TEE_Result init_with_ldelf(struct tee_ta_session *sess,
 #ifdef CFG_TA_FTRACE_SUPPORT
 	utc->ftrace_entry_func = arg->ftrace_entry;
 	sess->fbuf = arg->fbuf;
-	/*
-	 * Enable accesses to frequency register and physical counter
-	 * register in el0 mode required for timestamping during
-	 * function tracing.
-	 */
-	write_cntkctl(read_cntkctl() | CNTKCTL_PL0PCTEN);
 #endif
 
 out:

core/arch/arm/sm/sm_a32.S

@@ -51,6 +51,11 @@ UNWIND(	.cantunwind)
 	read_pmcr r2
 	stm	r0!, {r2}
 #endif
+
+#ifdef CFG_TA_FTRACE_SUPPORT
+	read_cntkctl r2
+	stm	r0!, {r2}
+#endif
 	cps	#CPSR_MODE_MON
 	bx	lr
 UNWIND(	.fnend)
@@ -88,6 +93,11 @@ UNWIND(	.cantunwind)
 	ldm	r0!, {r2}
 	write_pmcr r2
 #endif
+
+#ifdef CFG_TA_FTRACE_SUPPORT
+	ldm	r0!, {r2}
+	write_cntkctl r2
+#endif
 	cps	#CPSR_MODE_MON
 	bx	lr
 UNWIND(	.fnend)