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core: arm: S-EL1 SPMC: boot ABI update
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Updates the boot ABI for S-EL1 SPMC to align better with other SPMCs,
like Hafnium, but also with the non-FF-A configuration.

Register usage:
X0 - TOS FW config [1] address, if not NULL
X2 - System DTB, if not NULL

Adds check in the default get_aslr_seed() to see if the system DTB is
present before trying to read kaslr-seed from secure-chosen.

Note that this is an incompatible change and requires corresponding
change in TF-A ("feat(qemu): update abi between spmd and spmc") [2].

[1] A TF-A concept: TOS_FW_CONFIG - Trusted OS Firmware configuration
    file. Used by Trusted OS (BL32), that is, OP-TEE in this case
Link: [2] https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=25ae7ad1878244f78206cc7c91f7bdbd267331a1

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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jenswi-linaro authored and jforissier committed Jan 30, 2023
1 parent 4dce38c commit f1f431c
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Showing 2 changed files with 15 additions and 10 deletions.
8 changes: 7 additions & 1 deletion core/arch/arm/kernel/boot.c
Expand Up @@ -1502,11 +1502,17 @@ struct ns_entry_context *boot_core_hpen(void)
#if defined(CFG_DT)
unsigned long __weak get_aslr_seed(void *fdt)
{
int rc = fdt_check_header(fdt);
int rc = 0;
const uint64_t *seed = NULL;
int offs = 0;
int len = 0;

if (!fdt) {
DMSG("No fdt");
goto err;
}

rc = fdt_check_header(fdt);
if (rc) {
DMSG("Bad fdt: %d", rc);
goto err;
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17 changes: 8 additions & 9 deletions core/arch/arm/kernel/entry_a64.S
Expand Up @@ -143,21 +143,20 @@
.endm

FUNC _start , :
#if defined(CFG_CORE_SEL1_SPMC)
/*
* With OP-TEE as SPMC at S-EL1 the SPMD (SPD_spmd) in TF-A passes
* the DTB in x0, pagaeble part in x1 and the rest of the registers
* are unused
* If CFG_CORE_FFA is enabled, then x0 if non-NULL holds the TOS FW
* config [1] address, else x0 if non-NULL holds the pagable part
* address.
*
* [1] A TF-A concept: TOS_FW_CONFIG - Trusted OS Firmware
* configuration file. Used by Trusted OS (BL32), that is, OP-TEE
* here.
*/
mov x19, x1 /* Save pagable part */
mov x20, x0 /* Save DT address */
#else
mov x19, x0 /* Save pagable part address */
mov x19, x0
#if defined(CFG_DT_ADDR)
ldr x20, =CFG_DT_ADDR
#else
mov x20, x2 /* Save DT address */
#endif
#endif

adr x0, reset_vect_table
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