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Clang Format VU files
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refractionpcsx2 committed Aug 31, 2021
1 parent 553d8cc commit bda80fc
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122 changes: 66 additions & 56 deletions pcsx2/VU.h
Original file line number Diff line number Diff line change
Expand Up @@ -18,87 +18,96 @@

enum VURegFlags
{
REG_STATUS_FLAG = 16,
REG_MAC_FLAG = 17,
REG_CLIP_FLAG = 18,
REG_ACC_FLAG = 19, // dummy flag that indicates that VFACC is written/read (nothing to do with VI[19])
REG_R = 20,
REG_I = 21,
REG_Q = 22,
REG_P = 23, // only exists in micromode
REG_VF0_FLAG = 24, // dummy flag that indicates VF0 is read (nothing to do with VI[24])
REG_TPC = 26,
REG_CMSAR0 = 27,
REG_FBRST = 28,
REG_VPU_STAT = 29,
REG_CMSAR1 = 31
REG_STATUS_FLAG = 16,
REG_MAC_FLAG = 17,
REG_CLIP_FLAG = 18,
REG_ACC_FLAG = 19, // dummy flag that indicates that VFACC is written/read (nothing to do with VI[19])
REG_R = 20,
REG_I = 21,
REG_Q = 22,
REG_P = 23, // only exists in micromode
REG_VF0_FLAG = 24, // dummy flag that indicates VF0 is read (nothing to do with VI[24])
REG_TPC = 26,
REG_CMSAR0 = 27,
REG_FBRST = 28,
REG_VPU_STAT = 29,
REG_CMSAR1 = 31
};

//interpreter hacks, WIP
//#define INT_VUSTALLHACK //some games work without those, big speedup
//#define INT_VUDOUBLEHACK

enum VUStatus {
enum VUStatus
{
VU_Ready = 0,
VU_Run = 1,
VU_Stop = 2,
VU_Run = 1,
VU_Stop = 2,
};

union VECTOR {
struct {
float x,y,z,w;
union VECTOR
{
struct
{
float x, y, z, w;
} f;
struct {
u32 x,y,z,w;
struct
{
u32 x, y, z, w;
} i;

float F[4];

u128 UQ;
s128 SQ;
u64 UD[2]; //128 bits
u64 UD[2]; //128 bits
s64 SD[2];
u32 UL[4];
s32 SL[4];
u16 US[8];
s16 SS[8];
u8 UC[16];
s8 SC[16];
u8 UC[16];
s8 SC[16];
};

struct REG_VI {
union {
struct REG_VI
{
union
{
float F;
s32 SL;
u32 UL;
s16 SS[2];
u16 US[2];
s8 SC[4];
u8 UC[4];
s32 SL;
u32 UL;
s16 SS[2];
u16 US[2];
s8 SC[4];
u8 UC[4];
};
u32 padding[3]; // needs padding to make them 128bit; VU0 maps VU1's VI regs as 128bits to addr 0x4xx0 in
// VU0 mem, with only lower 16 bits valid, and the upper 112bits are hardwired to 0 (cottonvibes)
// VU0 mem, with only lower 16 bits valid, and the upper 112bits are hardwired to 0 (cottonvibes)
};

//#define VUFLAG_BREAKONMFLAG 0x00000001
#define VUFLAG_MFLAGSET 0x00000002
#define VUFLAG_INTCINTERRUPT 0x00000004
struct fdivPipe {
#define VUFLAG_MFLAGSET 0x00000002
#define VUFLAG_INTCINTERRUPT 0x00000004
struct fdivPipe
{
int enable;
REG_VI reg;
u32 sCycle;
u32 Cycle;
u32 statusflag;
};

struct efuPipe {
struct efuPipe
{
int enable;
REG_VI reg;
u32 sCycle;
u32 Cycle;
};

struct fmacPipe {
struct fmacPipe
{
int enable;
int reg;
int xyzw;
Expand All @@ -109,22 +118,24 @@ struct fmacPipe {
u32 clipflag;
};

struct ialuPipe {
struct ialuPipe
{
int enable;
int reg;
u32 sCycle;
u32 Cycle;
};

struct __aligned16 VURegs {
VECTOR VF[32]; // VF and VI need to be first in this struct for proper mapping
REG_VI VI[32]; // needs to be 128bit x 32 (cottonvibes)
struct __aligned16 VURegs
{
VECTOR VF[32]; // VF and VI need to be first in this struct for proper mapping
REG_VI VI[32]; // needs to be 128bit x 32 (cottonvibes)

VECTOR ACC;
REG_VI q;
REG_VI p;

uint idx; // VU index (0 or 1)
uint idx; // VU index (0 or 1)

// flags/cycle are needed by VIF dma code, so they have to be here (for now)
// We may replace these by accessors in the future, if merited.
Expand Down Expand Up @@ -157,8 +168,8 @@ struct __aligned16 VURegs {

s32 nextBlockCycles;

u8 *Mem;
u8 *Micro;
u8* Mem;
u8* Micro;

u32 ebit;

Expand Down Expand Up @@ -188,13 +199,13 @@ struct __aligned16 VURegs {

enum VUPipeState
{
VUPIPE_NONE = 0,
VUPIPE_FMAC,
VUPIPE_FDIV,
VUPIPE_EFU,
VUPIPE_IALU,
VUPIPE_BRANCH,
VUPIPE_XGKICK
VUPIPE_NONE = 0,
VUPIPE_FMAC,
VUPIPE_FDIV,
VUPIPE_EFU,
VUPIPE_IALU,
VUPIPE_BRANCH,
VUPIPE_XGKICK
};

extern __aligned16 VURegs vuRegs[2];
Expand All @@ -205,8 +216,7 @@ static VURegs& VU0 = vuRegs[0];
static VURegs& VU1 = vuRegs[1];

// Do not use __fi here because it fires 'multiple definition' error in GCC
inline bool VURegs::IsVU1() const { return this == &vuRegs[1]; }
inline bool VURegs::IsVU0() const { return this == &vuRegs[0]; }
inline bool VURegs::IsVU1() const { return this == &vuRegs[1]; }
inline bool VURegs::IsVU0() const { return this == &vuRegs[0]; }

extern u32* GET_VU_MEM(VURegs* VU, u32 addr);

37 changes: 22 additions & 15 deletions pcsx2/VUmicro.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19,48 +19,55 @@
#include "MTVU.h"

// Executes a Block based on EE delta time
void BaseVUmicroCPU::ExecuteBlock(bool startUp) {
const u32& stat = VU0.VI[REG_VPU_STAT].UL;
const int test = m_Idx ? 0x100 : 1;
const int s = EmuConfig.Gamefixes.VUKickstartHack ? 16 : 0; // Kick Start Cycles (Jak needs at least 4 due to writing values after they're read
void BaseVUmicroCPU::ExecuteBlock(bool startUp)
{
const u32& stat = VU0.VI[REG_VPU_STAT].UL;
const int test = m_Idx ? 0x100 : 1;
const int s = EmuConfig.Gamefixes.VUKickstartHack ? 16 : 0; // Kick Start Cycles (Jak needs at least 4 due to writing values after they're read

if (m_Idx && THREAD_VU1)
{
vu1Thread.Get_MTVUChanges();
return;
}

if (!(stat & test)) return;
if (!(stat & test))
return;

if (startUp && s) { // Start Executing a microprogram
if (startUp && s)
{ // Start Executing a microprogram
Execute(s); // Kick start VU
}
else { // Continue Executing
else
{ // Continue Executing
u32 cycle = m_Idx ? VU1.cycle : VU0.cycle;
s32 delta = (s32)(u32)(cpuRegs.cycle - cycle);
s32 nextblockcycles = m_Idx ? VU1.nextBlockCycles : VU0.nextBlockCycles;

if (delta < nextblockcycles)
return;

if (delta > 0) // Enough time has passed
Execute(delta); // Execute the time since the last call
if (delta > 0) // Enough time has passed
Execute(delta); // Execute the time since the last call
}
}

// This function is called by VU0 Macro (COP2) after transferring some
// EE data to VU0's registers. We want to run VU0 Micro right after this
// to ensure that the register is used at the correct time.
// This fixes spinning/hanging in some games like Ratchet and Clank's Intro.
void BaseVUmicroCPU::ExecuteBlockJIT(BaseVUmicroCPU* cpu) {
const u32& stat = VU0.VI[REG_VPU_STAT].UL;
const int test = 1;
void BaseVUmicroCPU::ExecuteBlockJIT(BaseVUmicroCPU* cpu)
{
const u32& stat = VU0.VI[REG_VPU_STAT].UL;
const int test = 1;

if (stat & test) { // VU is running
if (stat & test)
{ // VU is running
s32 delta = (s32)(u32)(cpuRegs.cycle - VU0.cycle);

if (delta > 0) { // Enough time has passed
cpu->Execute(delta); // Execute the time since the last call
if (delta > 0)
{ // Enough time has passed
cpu->Execute(delta); // Execute the time since the last call
}
}
}
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