CCmicros - micros version using Cycle counter

[Defragster]

Alternate micros() extends millis() using ARM_DWT_CYCCNT

Also makes unused_interrupt_vector() weak to allow user override like Teensy3

Startup is CycCnt dependent to match millis() in significant digits - but once running offset to last systick_isr is true based on Cycle Counter

[Defragster]

Paul - is this complete - all based only on F_CPU_ACTUAL? Is that always right?

Is there any needed _isr related cache issues that need checked?

[PaulStoffregen]

I have many concerns about ways this could fail....

[Defragster]

Any specifics or directions? The startup is odd with the change and the MAGIC_val I was testing then brought in fetched cores and it went odd - and the magic was not needed before ...

I'll go edit PR and perhaps you could do a pull for micros unchanged and a rename of the new code ccmicros() for testing and observation

[Defragster]

Put pull request edit to have ccmicros() as the new CycCnt code. Used like that while I was testing against micros(). Will use the manitou's GPT1_CNT code to compare.

I'll see if I can use the exposed:
attribute((weak))
void unused_interrupt_vector(void)

And add my debug_t4 trace logging version of debug_t3 I started on to give more info on faults and without.

on beta thread at post 960 - https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=195856&viewfull=1#post195856

[Defragster]

Is this better:: testing and wrote this in post 973:
Way more boring/trivial - but just doing this:
[CODE]extern "C" void systick_isr(void)
{
systick_cycle_count = ARM_DWT_CYCCNT; // was > += F_CPU_ACTUAL/1000;
systick_millis_count++;
MillisTimer::runFromTimer();
}
[/CODE]

Avoids a recurring division in systick_isr . And micros() will always track millis() [no need for _sync code _isr swap]- tracking includes its jitter on handling the _isr and jumps for lost counts. But for 1 MHz timing with 600 MHz CycCnt the jitter should go away in rounding error

[Defragster]

Just posted: https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=196050&viewfull=1#post196050

Have a good test sketch posted that uses 'ARM Synchronization Primitives ' for reading the values from the _isr. I'll update the Pull request in some hours with offered code based on that - and any feedback.

[Defragster]

Code update includes ARM Synchronization Primitives __LDREXW and __STREXW to wrap the read of TWO systick values and force read reading if systick_isr [or any] interrupt occurs.

Tested with notes forum post 1029 : https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=196115&viewfull=1#post196115 and links github to sample sketches 'stand alone' w/Syncron_isr and using updated micros Syncron_Micros.

[Defragster]

Done! - Thanks Frank - good to know you looked that closely! I intended to remove that 'volatile' when I pulled out my other variant that relied on it.

#include "core_cmInstr.h" is not required only #include "arm_math.h" to get the synch code.

[PaulStoffregen]

ok, let's give this a try and see how it goes....

[Defragster]

Nice. Fetched the CORES - put on my install and my test code is working with no build issues.
Showing Tempmon and cycling speed [200...800]MHz. Not trying 900 MHz - 800 was enough to know that the micros() math works across the listed range so far. There is some last us digit jitter at ~100 MHz.