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* Add representation of `expr.Var` to `DAGCircuit` This adds basic support for `Var`s to `DAGCircuit`, enabling the base representation using the same wire structure used for clbits. This is known to be an inefficient representation of the dataflow for clbits, which can be read multiple times without implying an order between those operations (unlike qubits for which reads and writes are more naturally linked). We're using this simpler representation to make a better initial MVP; optimising the data-flow representation would come as part of a larger effort within the `DAGCircuit`. This commit adds support in `DAGCircuit` for: - representation of `Var` nodes - appending all operations that might contain `Var` nodes to the DAG and updating the wire structure (including control-flow ops and stores) - equality checking of DAGs with `Var`s (and so enables `QuantumCircuit.__eq__` as well) - `DAGCircuit.copy_empty_like` with `Var`s - the DAG/circuit converters The other methods in `DAGCircuit` that might need to be aware of `Var` nodes will be handled separately. * Expand test coverage * Fix copy/paste error
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