cpu/k64f: initial import for the Freescale K64F Cortex-M4 MCU

cpu/k64f/Makefile

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+# define the module that is build
+MODULE = cpu
+
+# add a list of subdirectories, that should also be build
+DIRS = periph $(RIOTCPU)/cortexm_common $(KINETIS_COMMON)
+
+include $(RIOTBASE)/Makefile.base

cpu/k64f/Makefile.include

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+# define the CPU architecture for the k64f
+export CPU_ARCH = cortex-m4
+
+# tell the build system that the CPU depends on the Kinetis common files
+export USEMODULE += kinetis_common
+
+# define path to kinetis module, which is needed for this CPU
+export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
+# CPU depends on the kinetis module, so include it
+include $(KINETIS_COMMON)Makefile.include
+
+export LINKFLAGS += -L$(RIOTCPU)/kinetis_common/ldscripts
+
+#export the CPU model
+MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
+export CFLAGS += -DCPU_MODEL_$(MODEL)
+ARCH = $(shell echo $(CPU_ARCH) | tr 'a-z-' 'A-Z_')
+export CFLAGS += -DCPU_ARCH_$(ARCH)
+
+# this CPU implementation is using kinetis common startup
+export COMMON_STARTUP = $(KINETIS_COMMON)
+
+# add the CPU specific system calls implementations for the linker
+export UNDEF += $(BINDIR)cpu/vectors.o
+
+include $(RIOTCPU)/Makefile.include.cortexm_common

cpu/k64f/cpu.c

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+/*
+ * Copyright (C) 2014 Freie Universität Berlin
+ * Copyright (C) 2015 PHYTEC Messtechnik GmbH
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @ingroup     cpu_k64f
+ * @{
+ *
+ * @file
+ * @brief       Implementation of the K64F CPU initialization
+ *
+ * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
+ * @author      Johann Fischer <j.fischer@phytec.de>
+ * @}
+ */
+
+#include <stdint.h>
+#include "cpu.h"
+#include "cpu_conf.h"
+
+#define SIM_CLKDIV1_60MHZ      (SIM_CLKDIV1_OUTDIV1(0) | \
+                                SIM_CLKDIV1_OUTDIV2(0) | \
+                                SIM_CLKDIV1_OUTDIV3(1) | \
+                                SIM_CLKDIV1_OUTDIV4(2))
+
+static void cpu_clock_init(void);
+
+/**
+ * @brief Initialize the CPU, set IRQ priorities
+ */
+void cpu_init(void)
+{
+    /* initialize the Cortex-M core */
+    cortexm_init();
+    /* initialize the clock system */
+    cpu_clock_init();
+}
+
+/**
+ * @brief Configure the controllers clock system
+ *
+ * | Clock name | Run mode frequency (max) | VLPR mode frequency (max) |
+ *
+ * | Core       | 120 MHz                  |   4 MHz                   |
+ * | System     | 120 MHz                  |   4 MHz                   |
+ * | Bus        |  60 MHz                  |   4 MHz                   |
+ * | FlexBus    |  50 MHz                  | 800 kHz                   |
+ * | Flash      |  25 MHz                  |   4 MHz                   |
+ */
+static void cpu_clock_init(void)
+{
+    /* setup system prescalers */
+    SIM->CLKDIV1 = (uint32_t)SIM_CLKDIV1_60MHZ;
+
+    /* RMII RXCLK */
+    SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
+    PORTA->PCR[18] &= ~(PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x07));
+
+    kinetis_mcg_set_mode(KINETIS_MCG_PEE);
+}

cpu/k64f/include/cpu_conf.h

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+/*
+ * Copyright (C) 2015 Freie Universität Berlin
+ * Copyright (C) 2015 PHYTEC Messtechnik GmbH
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @defgroup        cpu_k64f Freescale K64F MCU
+ * @ingroup         cpu
+ * @brief           CPU specific implementations for the Freescale K64F
+ *                  Kinetis Cortex-M4 MCU.
+ * @{
+ *
+ * @file
+ * @brief           Implementation specific CPU configuration options
+ *
+ * @author          Hauke Petersen <hauke.peterse@fu-berlin.de>
+ * @author          Johann Fischer <j.fischer@phytec.de>
+ */
+
+#ifndef __CPU_CONF_H
+#define __CPU_CONF_H
+
+#ifdef CPU_MODEL_MK64FN1M0VLL12
+#include "MK64F12.h"
+#else
+#error "undefined CPU_MODEL"
+#endif
+
+#include "mcg.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief   ARM Cortex-M specific CPU configuration
+ * @{
+ */
+#define CPU_DEFAULT_IRQ_PRIO            (1U)
+#define CPU_IRQ_NUMOF                   (86U)
+#define CPU_FLASH_BASE                  (0x00000000)
+/** @} */
+
+/**
+ * @brief Length for reading CPU_ID in octets
+ */
+#define CPUID_ID_LEN                     (16)
+
+/**
+ * @brief Pointer to CPU_ID
+ */
+#define CPUID_ID_PTR                     ((void *)(&(SIM_UIDH)))
+
+
+/**
+ * @brief MCU specific Low Power Timer settings.
+ */
+#define LPTIMER_CLKSRC                   LPTIMER_CLKSRC_LPO
+#define LPTIMER_DEV                      (LPTMR0) /**< LPTIMER hardware module */
+#define LPTIMER_CLKEN()                  (SIM->SCGC5 |= SIM_SCGC5_LPTMR_MASK) /**< Enable LPTMR0 clock gate */
+#define LPTIMER_CLKDIS()                 (SIM->SCGC5 &= ~SIM_SCGC5_PTMR_MASK) /**< Disable LPTMR0 clock gate */
+#define LPTIMER_CNR_NEEDS_LATCHING       1 /**< LPTMR.CNR register do not need latching */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CPU_CONF_H */
+/** @} */

cpu/k64f/ldscripts/mk64fn1m0vll12.ld

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+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+MEMORY
+{
+    vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
+    flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
+    flash (rx)    : ORIGIN = 0x00000410, LENGTH = 1024K - 0x410
+    sram (rwx)   : ORIGIN = 0x1fff0198, LENGTH = 256K-0x198
+}
+
+INCLUDE kinetis-noramcode.ld

cpu/k64f/lpm_arch.c

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+/*
+ * Copyright (C) 2014 Freie Universität Berlin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @ingroup     cpu_k64f
+ * @{
+ *
+ * @file
+ * @brief       Implementation of the kernels power management interface
+ *
+ * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
+ *
+ * @}
+ */
+
+#include "arch/lpm_arch.h"
+
+void lpm_arch_init(void)
+{
+    /* TODO */
+}
+
+enum lpm_mode lpm_arch_set(enum lpm_mode target)
+{
+    /* TODO */
+    return 0;
+}
+
+enum lpm_mode lpm_arch_get(void)
+{
+    /* TODO */
+    return 0;
+}
+
+void lpm_arch_awake(void)
+{
+    /* TODO */
+}
+
+void lpm_arch_begin_awake(void)
+{
+    /* TODO */
+}
+
+void lpm_arch_end_awake(void)
+{
+    /* TODO */
+}

cpu/k64f/periph/Makefile

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+MODULE = periph
+
+include $(RIOTBASE)/Makefile.base