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cpu/nrf5x: rework periph_uart driver to allow use of multiple UARTs with nrf52840 #10621

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merged 7 commits into from
Jan 25, 2019
Merged

cpu/nrf5x: rework periph_uart driver to allow use of multiple UARTs with nrf52840 #10621

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8e8f48f
cpu/nrf52: add multi UART support for nrf52840
aabadie Dec 15, 2018
1be6074
boards/nrf52xxxdk: refactor UART config
aabadie Dec 15, 2018
336851e
cpu/nrf52: add uart flow control on nrf52840
aabadie Dec 16, 2018
190d48c
boards/nrf52840dk: configure uart flow control pins
aabadie Dec 16, 2018
cb8c2b7
cpu/nrf52: use UARTE device type for nrf52840
aabadie Dec 17, 2018
72f3f7d
boards/nrf52840dk: add second UART interface
aabadie Dec 17, 2018
93e7d88
cpu/nrf5x: reworked and fixed UART driver
haukepetersen Jan 25, 2019
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15 changes: 3 additions & 12 deletions ...s/common/nrf52xxxdk/include/periph_conf.h → ...n/nrf52xxxdk/include/periph_conf_common.h
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Original file line number Diff line number Diff line change
Expand Up @@ -18,8 +18,8 @@
*
*/

#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#ifndef PERIPH_CONF_COMMON_H
#define PERIPH_CONF_COMMON_H

#include "periph_cpu.h"
#include "cfg_clock_32_1.h"
Expand All @@ -30,15 +30,6 @@
extern "C" {
#endif

/**
* @name UART configuration
* @{
*/
#define UART_NUMOF (1U)
#define UART_PIN_RX GPIO_PIN(0,8)
#define UART_PIN_TX GPIO_PIN(0,6)
/** @} */

/**
* @name SPI configuration
* @{
Expand Down Expand Up @@ -84,5 +75,5 @@ static const pwm_conf_t pwm_config[] = {
}
#endif

#endif /* PERIPH_CONF_H */
#endif /* PERIPH_CONF_COMMON_H */
/** @} */
63 changes: 63 additions & 0 deletions boards/nrf52840dk/include/periph_conf.h
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Original file line number Diff line number Diff line change
@@ -0,0 +1,63 @@
/*
* Copyright (C) 2018 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/

/**
* @ingroup boards_nrf52840dk
* @{
*
* @file
* @brief Peripheral configuration for the nRF52840 DK
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
*/

#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

#include "periph_conf_common.h"

#ifdef __cplusplus
extern "C" {
#endif

/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{ /* Mapped to USB virtual COM port */
.dev = NRF_UARTE0,
.rx_pin = GPIO_PIN(0,8),
.tx_pin = GPIO_PIN(0,6),
.rts_pin = GPIO_PIN(0,5),
.cts_pin = GPIO_PIN(0,7),
.irqn = UARTE0_UART0_IRQn,
},
{ /* Mapped to Arduino D0/D1 pins */
.dev = NRF_UARTE1,
.rx_pin = GPIO_PIN(1,1),
.tx_pin = GPIO_PIN(1,2),
.rts_pin = (uint8_t)GPIO_UNDEF,
.cts_pin = (uint8_t)GPIO_UNDEF,
.irqn = UARTE1_IRQn,
},
};

#define UART_0_ISR (isr_uart0)
#define UART_1_ISR (isr_uarte1)

#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

#ifdef __cplusplus
}
#endif

#endif /* PERIPH_CONF_H */
/** @} */
45 changes: 45 additions & 0 deletions boards/nrf52dk/include/periph_conf.h
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Original file line number Diff line number Diff line change
@@ -0,0 +1,45 @@
/*
* Copyright (C) 2016-2018 Freie Universität Berlin
* 2018 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/

/**
* @ingroup boards_nrf52dk
* @{
*
* @file
* @brief Peripheral configuration for the nRF52 DK
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
*/

#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

#include "periph_conf_common.h"

#ifdef __cplusplus
extern "C" {
#endif

/**
* @name UART configuration
* @{
*/
#define UART_NUMOF (1U)
#define UART_PIN_RX GPIO_PIN(0,8)
#define UART_PIN_TX GPIO_PIN(0,6)
/** @} */

#ifdef __cplusplus
}
#endif

#endif /* PERIPH_CONF_H */
/** @} */
17 changes: 16 additions & 1 deletion cpu/nrf52/include/periph_cpu.h
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Original file line number Diff line number Diff line change
Expand Up @@ -39,10 +39,12 @@ extern "C" {
* @brief Redefine some peripheral names to unify them between nRF51 and 52
* @{
*/
#define UART_IRQN (UARTE0_UART0_IRQn)
#define SPI_SCKSEL (dev(bus)->PSEL.SCK)
#define SPI_MOSISEL (dev(bus)->PSEL.MOSI)
#define SPI_MISOSEL (dev(bus)->PSEL.MISO)
#ifndef CPU_MODEL_NRF52840XXAA
#define UART_IRQN (UARTE0_UART0_IRQn)
#endif
/** @} */

/**
Expand Down Expand Up @@ -155,6 +157,19 @@ typedef struct {
uint32_t pin[PWM_CHANNELS]; /**< PWM out pins */
} pwm_conf_t;

#ifdef CPU_MODEL_NRF52840XXAA
/**
* @brief Structure for UART configuration data
*/
typedef struct {
NRF_UARTE_Type *dev; /**< UART with EasyDMA device base register address */
uint8_t rx_pin; /**< RX pin */
uint8_t tx_pin; /**< TX pin */
uint8_t rts_pin; /**< RTS pin - set to GPIO_UNDEF when not using HW flow control */
uint8_t cts_pin; /**< CTS pin - set to GPIO_UNDEF when not using HW flow control */
uint8_t irqn; /**< IRQ channel */
} uart_conf_t;
#endif

#ifdef __cplusplus
}
Expand Down
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