Workaround for VS 16.5

Strange codegen bug didn't promote s32 to u64.
RPCS3 · Mar 23, 2020 · 21c3fab · 21c3fab
1 parent a050932
commit 21c3fab
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Showing 2 changed files with 6 additions and 4 deletions.
diff --git a/appveyor.yml b/appveyor.yml
@@ -1,7 +1,7 @@
 
 version: '{build}'
 
-image: Previous Visual Studio 2019
+image: Visual Studio 2019
 
 environment:
   QTDIR: C:\Qt\5.14\msvc2017_64

diff --git a/rpcs3/Emu/Cell/PPUTranslator.cpp b/rpcs3/Emu/Cell/PPUTranslator.cpp
@@ -908,7 +908,7 @@ void PPUTranslator::VMADDFP(ppu_opcode_t op)
 		SetVr(op.vd, m_ir->CreateCall(get_intrinsic<f32[4]>(llvm::Intrinsic::fma), { acb[0], acb[1], acb[2] }));
 		return;
 	}
-	
+
 	// Emulated FMA via double precision
 	auto a = get_vr<f32[4]>(op.va);
 	auto b = get_vr<f32[4]>(op.vb);
@@ -1797,7 +1797,8 @@ void PPUTranslator::ADDIS(ppu_opcode_t op)
 
 void PPUTranslator::BC(ppu_opcode_t op)
 {
-	const u64 target = (op.aa ? 0 : m_addr) + op.bt14;
+	const s32 bt14 = op.bt14; // Workaround for VS 16.5
+	const u64 target = (op.aa ? 0 : m_addr) + bt14;
 
 	if (op.aa && m_reloc)
 	{
@@ -1845,7 +1846,8 @@ void PPUTranslator::SC(ppu_opcode_t op)
 
 void PPUTranslator::B(ppu_opcode_t op)
 {
-	const u64 target = (op.aa ? 0 : m_addr) + op.bt24;
+	const s32 bt24 = op.bt24; // Workaround for VS 16.5
+	const u64 target = (op.aa ? 0 : m_addr) + bt24;
 
 	if (op.aa && m_reloc)
 	{