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Workaround for VS 16.5 #7837

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merged 1 commit into from
Mar 23, 2020
Merged

Workaround for VS 16.5 #7837

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2 changes: 1 addition & 1 deletion appveyor.yml
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@

version: '{build}'

image: Previous Visual Studio 2019
image: Visual Studio 2019

environment:
QTDIR: C:\Qt\5.14\msvc2017_64
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8 changes: 5 additions & 3 deletions rpcs3/Emu/Cell/PPUTranslator.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -908,7 +908,7 @@ void PPUTranslator::VMADDFP(ppu_opcode_t op)
SetVr(op.vd, m_ir->CreateCall(get_intrinsic<f32[4]>(llvm::Intrinsic::fma), { acb[0], acb[1], acb[2] }));
return;
}

// Emulated FMA via double precision
auto a = get_vr<f32[4]>(op.va);
auto b = get_vr<f32[4]>(op.vb);
Expand Down Expand Up @@ -1797,7 +1797,8 @@ void PPUTranslator::ADDIS(ppu_opcode_t op)

void PPUTranslator::BC(ppu_opcode_t op)
{
const u64 target = (op.aa ? 0 : m_addr) + op.bt14;
const s32 bt14 = op.bt14; // Workaround for VS 16.5
const u64 target = (op.aa ? 0 : m_addr) + bt14;

if (op.aa && m_reloc)
{
Expand Down Expand Up @@ -1845,7 +1846,8 @@ void PPUTranslator::SC(ppu_opcode_t op)

void PPUTranslator::B(ppu_opcode_t op)
{
const u64 target = (op.aa ? 0 : m_addr) + op.bt24;
const s32 bt24 = op.bt24; // Workaround for VS 16.5
const u64 target = (op.aa ? 0 : m_addr) + bt24;

if (op.aa && m_reloc)
{
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