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[WIP] Implement TSC calibration #7966
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Shows TSC correctly now. Ran it over 10 times and only the last 2 digits would change. Rarely the third digit from the end would also change. RPCS3 v0.0.9-4f8c3ee2 Alpha | fixup | Firmware version: 4.85 |
20 tests on my i7 7700HQ: TSC: 2.807999GHz TSC: 2.807998GHz TSC: 2.807989GHz -- first bigger diff TSC: 2.808092GHz |
10times + Nothing fancy running |
ran it 20 times on a Ryzen 7 2700 |
Ran 10 times on 8700k@5GHz RPCS3 v0.0.9-4f8c3ee2 Alpha | fixup | Firmware version: 4.84 TSC: 3.696000GHz |
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Back to 2 digits after dot. |
Try to get rough TSC frequency by sampling it.
Have problems if using in Windows 10 Pro 64 1809 "bcdedit /set useplatformclock true" ? Is very much mess in internet about timers. Well I will test using bcdedit /set useplatformclock false with 0.0.9-10134 and will report the result. |
Try to get rough TSC frequency by sampling it.
Should fix "TSC: Bad" in most cases.
Please report your results after running RPCS3 several times (10-20).