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This repository has been archived by the owner on Jun 7, 2023. It is now read-only.

Add: Copy over a Verilog test bench if present. #117

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Dec 6, 2022

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@bjones1 bjones1 commented Dec 6, 2022

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@bjones1 bjones1 marked this pull request as ready for review December 6, 2022 03:55
@bjones1 bjones1 requested a review from bnmnetp December 6, 2022 03:55
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bjones1 commented Dec 6, 2022

Thanks! Would you merge this? Since test fail, I don't have permission to merge.

@bnmnetp bnmnetp merged commit 9ac899a into RunestoneInteractive:main Dec 6, 2022
@bjones1 bjones1 deleted the verilog-test-vectors branch December 6, 2022 18:33
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