Digital Logic Design Course Projects

This repository contains my Digital Logic Design course projects (Fall 2020) at University of Tehran.

1. CA1 : Basic Switch and Gate Structure in Verilog
2. CA2 : Basic Switch and Gate Structure in Verilog
3. CA3 : Small-scale RT Level Components, Iterative Logic
4. CA4 : Basic Memmory Structure, Latches and Flip-flops
5. CA5 : Counters, Shifters, State Machines
6. CA6 : RTL Complete Component Design