reServer AGX Orin: add gmsl device tree

origin source code: https://github.com/Demon000/linux/tree/jetson_35.3.1/arch/arm64/boot/dts/gmsl
Seeed-Studio · Apr 7, 2024 · 9d01d63 · 9d01d63
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diff --git a/include/dt-bindings/media/camera.h b/include/dt-bindings/media/camera.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/*
+ * This header provides constants for binding nvidia,camera.
+ *
+ */
+
+#ifndef __DT_BINDINGS_MEDIA_CAMERA_H__
+#define __DT_BINDINGS_MEDIA_CAMERA_H__
+
+#define NV_TRUE			1
+#define	NV_FALSE		0
+
+#define CAMERA_INT_MASK			0xf0000000
+#define CAMERA_TABLE_WAIT_US		(CAMERA_INT_MASK | 1)
+#define CAMERA_TABLE_WAIT_MS		(CAMERA_INT_MASK | 2)
+#define CAMERA_TABLE_END		(CAMERA_INT_MASK | 9)
+#define CAMERA_TABLE_PWR		(CAMERA_INT_MASK | 20)
+#define CAMERA_TABLE_PINMUX		(CAMERA_INT_MASK | 25)
+#define CAMERA_TABLE_INX_PINMUX		(CAMERA_INT_MASK | 26)
+#define CAMERA_TABLE_GPIO_ACT		(CAMERA_INT_MASK | 30)
+#define CAMERA_TABLE_GPIO_DEACT		(CAMERA_INT_MASK | 31)
+#define CAMERA_TABLE_GPIO_INX_ACT	(CAMERA_INT_MASK | 32)
+#define CAMERA_TABLE_GPIO_INX_DEACT	(CAMERA_INT_MASK | 33)
+#define CAMERA_TABLE_REG_NEW_POWER	(CAMERA_INT_MASK | 40)
+#define CAMERA_TABLE_INX_POWER		(CAMERA_INT_MASK | 41)
+#define CAMERA_TABLE_INX_CLOCK		(CAMERA_INT_MASK | 50)
+#define CAMERA_TABLE_INX_CGATE		(CAMERA_INT_MASK | 51)
+#define CAMERA_TABLE_EDP_STATE		(CAMERA_INT_MASK | 60)
+#define CAMERA_TABLE_RAW_WRITE		(CAMERA_INT_MASK | 61)
+
+#define CAMERA_TABLE_PWR_FLAG_MASK	0xf0000000
+#define CAMERA_TABLE_PWR_FLAG_ON	0x80000000
+#define CAMERA_TABLE_PINMUX_FLAG_MASK	0xf0000000
+#define CAMERA_TABLE_PINMUX_FLAG_ON	0x80000000
+#define CAMERA_TABLE_CLOCK_VALUE_BITS	24
+#define CAMERA_TABLE_CLOCK_VALUE_MASK	\
+			((u32)(-1) >> (32 - CAMERA_TABLE_CLOCK_VALUE_BITS))
+#define CAMERA_TABLE_CLOCK_INDEX_BITS	(32 - CAMERA_TABLE_CLOCK_VALUE_BITS)
+#define CAMERA_TABLE_CLOCK_INDEX_MASK	\
+			((u32)(-1) << (32 - CAMERA_TABLE_CLOCK_INDEX_BITS))
+
+#define CAMERA_PWR_ON(x)	(CAMERA_TABLE_PWR_FLAG_ON + x)
+#define CAMERA_PWR_OFF(x)	x
+
+#define CAMERA_MAX_EDP_ENTRIES  16
+#define CAMERA_MAX_NAME_LENGTH	32
+#define CAMDEV_INVALID		0xffffffff
+
+#define	CAMERA_SEQ_STATUS_MASK	0xf0000000
+#define	CAMERA_SEQ_INDEX_MASK	0x0000ffff
+#define	CAMERA_SEQ_FLAG_MASK	(~CAMERA_SEQ_INDEX_MASK)
+#define	CAMERA_SEQ_FLAG_EDP	0x80000000
+
+#define CAMERA_IND_CLK_SET(x)	CAMERA_TABLE_INX_CLOCK x
+#define CAMERA_IND_CLK_CLR	CAMERA_TABLE_INX_CLOCK 0
+#define CAMERA_GPIO_SET(x)	CAMERA_TABLE_GPIO_ACT x
+#define CAMERA_GPIO_CLR(x)	CAMERA_TABLE_GPIO_DEACT x
+#define CAMERA_REGULATOR_ON(x)	CAMERA_TABLE_PWR CAMERA_PWR_ON(x)
+#define CAMERA_REGULATOR_OFF(x)	CAMERA_TABLE_PWR CAMERA_PWR_OFF(x)
+#define CAMERA_WAITMS(x)	CAMERA_TABLE_WAIT_MS x
+#define CAMERA_WAITUS(x)	CAMERA_TABLE_WAIT_US x
+#define CAMERA_RAW_WRITE(x)	CAMERA_TABLE_RAW_WRITE x
+#define CAMERA_RAW_I2C_ADDRESS(client_addr, reg_addr, value) \
+		((client_addr << 24) | (reg_addr << 8) | value)
+#define CAMERA_END		CAMERA_TABLE_END 0
+
+#endif
+/* __DT_BINDINGS_MEDIA_CAMERA_H__ */
diff --git a/overlays/agx-orin/gmsl/gmsl-deserializer-channel.dtsi b/overlays/agx-orin/gmsl/gmsl-deserializer-channel.dtsi
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Analog Devices Inc.
+ */
+
+#if defined(DES_CH_INDEX)
+#define DES_CH_REG DES_CH_INDEX
+#define DES_CH_LABEL DES_CH_Y_LABEL(DES_CH_INDEX)
+#define DES_CH_OUT_LABEL DES_CH_Y_OUT_LABEL(DES_CH_INDEX)
+#define DES_CH_IN_LABEL DES_CH_Y_IN_LABEL(DES_CH_INDEX)
+#endif
+
+#if defined(SER_INDEX) && defined(SER_CH_INDEX)
+#define DES_CH_IN_REMOTE_LABEL SER_X_CH_Y_OUT_LABEL(SER_INDEX, SER_CH_INDEX)
+#endif
+
+#if defined(CSI_INDEX)
+#define DES_CH_OUT_REMOTE_LABEL CSI_X_IN_LABEL(CSI_INDEX)
+#endif
+
+#if !defined(DES_CH_PHY)
+#error
+#endif
+
+#if !defined(DES_CH_PHY_NUM_LANES)
+#error
+#endif
+
+#if !defined(DES_CH_REG)
+#error
+#endif
+
+#if !defined(DES_CH_OUT_LABEL)
+#error
+#endif
+
+#if !defined(DES_CH_IN_LABEL)
+#error
+#endif
+
+#if !defined(DES_CH_OUT_REMOTE_LABEL)
+#error
+#endif
+
+#if !defined(DES_CH_IN_REMOTE_LABEL)
+#error
+#endif
+
+#if !defined(DES_CH_PHY_LINK_FREQ)
+#error
+#endif
+
+#if !defined(DES_CH_PHY_CLOCK_LANE)
+#if defined(GMSL_DES_PHY_1_2_LANE_MODE_IN_4_LANES) && DES_CH_PHY == 1
+#define DES_CH_PHY_CLOCK_LANE 5
+#else
+#define DES_CH_PHY_CLOCK_LANE 0
+#endif
+#endif
+
+channel@DES_CH_REG {
+	reg = <DES_CH_REG>;
+
+	label = STRINGIFY(DES_CH_LABEL);
+
+	maxim,phy-id = <DES_CH_PHY>;
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			DES_CH_OUT_LABEL: endpoint {
+				remote-endpoint = <&DES_CH_OUT_REMOTE_LABEL>;
+				clock-lanes = <DES_CH_PHY_CLOCK_LANE>;
+#if DES_CH_PHY_NUM_LANES == 2
+				data-lanes = <1 2>;
+#elif DES_CH_PHY_NUM_LANES == 4
+				data-lanes = <1 2 3 4>;
+#else
+#error
+#endif
+				link-frequencies = /bits/ 64 <DES_CH_PHY_LINK_FREQ>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			DES_CH_IN_LABEL: endpoint {
+				remote-endpoint = <&DES_CH_IN_REMOTE_LABEL>;
+			};
+		};
+	};
+};
+
+#undef DES_CH_INDEX
+#undef SER_INDEX
+#undef SER_CH_INDEX
+#undef CSI_INDEX
+#undef DES_CH_PHY
+#undef DES_CH_PHY_NUM_LANES
+#undef DES_CH_PHY_CLOCK_LANE
+#undef DES_CH_REG
+#undef DES_CH_OUT_LABEL
+#undef DES_CH_IN_LABEL
+#undef DES_CH_OUT_REMOTE_LABEL
+#undef DES_CH_IN_REMOTE_LABEL
diff --git a/overlays/agx-orin/gmsl/gmsl-imx219-overlay.dtsi b/overlays/agx-orin/gmsl/gmsl-imx219-overlay.dtsi
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Analog Devices Inc.
+ */
+
+#if defined(DES_CH_INDEX)
+#if DES_CH_INDEX == 0
+#define DES_CH_SECOND_INDEX 4
+#elif DES_CH_INDEX == 1
+#define DES_CH_SECOND_INDEX 5
+#elif DES_CH_INDEX == 2
+#define DES_CH_SECOND_INDEX 6
+#elif DES_CH_INDEX == 3
+#define DES_CH_SECOND_INDEX 7
+#endif
+#endif
+
+#if defined(SER_INDEX)
+#define SER_LABEL CONCAT(ser_, SER_INDEX)
+#endif
+
+#if !defined(SER_LABEL)
+#error
+#endif
+
+#if !defined(DES_CH_SECOND_INDEX)
+#error
+#endif
+
+#define SER_MFP2_RESET_LABEL CONCAT(SER_LABEL, _mfp2_reset)
+
+&SER_LABEL {
+	SER_MFP2_RESET_LABEL {
+		gpio-hog;
+		output-low;
+		gpios = <2 0>;
+		label = STRINGIFY(SER_MFP2_RESET_LABEL);
+	};
+
+	pipe@0 {
+		maxim,dbl8;
+		maxim,soft-bpp = <10>;
+		maxim,bpp = <16>;
+	};
+
+	channel@1 {
+		reg = <1>;
+
+		label = STRINGIFY(SER_X_CH_Y_LABEL(SER_INDEX, 1));
+
+		maxim,embedded-data;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				SER_X_CH_Y_OUT_LABEL(SER_INDEX, 1): endpoint {
+					remote-endpoint = <&DES_CH_Y_IN_LABEL(DES_CH_SECOND_INDEX)>;
+				};
+			};
+		};
+	};
+};
+
+&des {
+	phy@GMSL_DES_PHY {
+		maxim,alt2-mem-map8;
+	};
+
+	channel@DES_CH_SECOND_INDEX {
+		reg = <DES_CH_SECOND_INDEX>;
+
+		maxim,phy-id = <GMSL_DES_PHY>;
+		maxim,embedded-data;
+
+		label = STRINGIFY(DES_CH_Y_LABEL(DES_CH_SECOND_INDEX));
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@1 {
+				reg = <1>;
+
+				DES_CH_Y_IN_LABEL(DES_CH_SECOND_INDEX): endpoint {
+					remote-endpoint = <&SER_X_CH_Y_OUT_LABEL(SER_INDEX, 1)>;
+				};
+			};
+		};
+	};
+};
+
+#undef SER_MFP2_RESET_LABEL
+
+#undef SER_INDEX
+#undef SER_LABEL
+#undef DES_CH_INDEX
+#undef DES_CH_SECOND_INDEX