Add a few spinalSimWhiteBox to ecp5 ip

SpinalHDL · Mar 22, 2021 · b0f7dfd · b0f7dfd
1 parent 225bc80
commit b0f7dfd
Showing 1 changed file with 8 additions and 0 deletions.
diff --git a/lib/src/main/scala/spinal/lib/blackbox/lattice/ecp5/IO.scala b/lib/src/main/scala/spinal/lib/blackbox/lattice/ecp5/IO.scala
@@ -52,6 +52,8 @@ case class IFS1P3BX() extends BlackBox{
   val SCLK, PD, SP, D = in Bool()
   val Q = out Bool()
   mapCurrentClockDomain(SCLK)
+  Q := RegNext(D)
+  spinalSimWhiteBox()
 }
 
 object OFS1P3BX{
@@ -67,6 +69,10 @@ case class OFS1P3BX() extends BlackBox{
   val SCLK, PD, SP, D = in Bool()
   val Q = out Bool()
   mapCurrentClockDomain(SCLK)
+
+  Q := RegNext(D)
+
+  spinalSimWhiteBox()
 }
 
 
@@ -76,4 +82,6 @@ case class Ulx3sUsrMclk() extends BlackBox{
 
   val USRMCLKI = in Bool()
   val USRMCLKTS = in Bool()
+
+  spinalSimWhiteBox()
 }