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Merge pull request #132 from StanfordAHA/share-multiplies2
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Refactor float convert code to share multiply
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rdaly525 committed Jun 14, 2019
2 parents 01ed97d + 1cef069 commit f7cbf65
Showing 1 changed file with 98 additions and 90 deletions.
188 changes: 98 additions & 90 deletions lassen/sim.py
Original file line number Diff line number Diff line change
Expand Up @@ -89,6 +89,102 @@ def alu(inst:Inst, a:Data, b:Data, d:Bit) -> (Data, Bit, Bit, Bit, Bit, Bit):
a_neg = fp_is_neg(a)
b_neg = fp_is_neg(b)

if alu == ALU.FCnvExp2F:
expa0 = BitVector[8](a[7:15])
biased_exp0 = SInt[9](expa0.zext(1))
unbiased_exp0 = SInt[9](biased_exp0 - SInt[9](127))
if (unbiased_exp0 < 0):
sign = BitVector[16](0x8000)
abs_exp0 = -unbiased_exp0
else:
sign = BitVector[16](0x0000)
abs_exp0 = unbiased_exp0
abs_exp = BitVector[8](abs_exp0[0:8])
scale = SInt[16](-127)
# for bit_pos in range(8):
# if (abs_exp[bit_pos]==Bit(1)):
# scale = bit_pos
if (abs_exp[0] == Bit(1)):
scale = SInt[16](0)
if (abs_exp[1] == Bit(1)):
scale = SInt[16](1)
if (abs_exp[2] == Bit(1)):
scale = SInt[16](2)
if (abs_exp[3] == Bit(1)):
scale = SInt[16](3)
if (abs_exp[4] == Bit(1)):
scale = SInt[16](4)
if (abs_exp[5] == Bit(1)):
scale = SInt[16](5)
if (abs_exp[6] == Bit(1)):
scale = SInt[16](6)
if (abs_exp[7] == Bit(1)):
scale = SInt[16](7)
normmant_mul_left = SInt[16](abs_exp)
normmant_mul_right = SInt[16](1) << (SInt[16](7)-scale)
normmant_mask = SInt[16](0x7F)
elif alu == ALU.FCnvInt2F:
if signed == Signed.signed:
sign = BitVector[16]((a) & 0x8000)
else:
sign = BitVector[16](0)
if (sign[15] == Bit(1)):
abs_input = BitVector[16](-a)
else:
abs_input = BitVector[16](a)
scale = SInt[16](-127)
# for bit_pos in range(8):
# if (abs_exp[bit_pos]==Bit(1)):
# scale = bit_pos
if (abs_input[0] == Bit(1)):
scale = SInt[16](0)
if (abs_input[1] == Bit(1)):
scale = SInt[16](1)
if (abs_input[2] == Bit(1)):
scale = SInt[16](2)
if (abs_input[3] == Bit(1)):
scale = SInt[16](3)
if (abs_input[4] == Bit(1)):
scale = SInt[16](4)
if (abs_input[5] == Bit(1)):
scale = SInt[16](5)
if (abs_input[6] == Bit(1)):
scale = SInt[16](6)
if (abs_input[7] == Bit(1)):
scale = SInt[16](7)
if (abs_input[8] == Bit(1)):
scale = SInt[16](8)
if (abs_input[9] == Bit(1)):
scale = SInt[16](9)
if (abs_input[10] == Bit(1)):
scale = SInt[16](10)
if (abs_input[11] == Bit(1)):
scale = SInt[16](11)
if (abs_input[12] == Bit(1)):
scale = SInt[16](12)
if (abs_input[13] == Bit(1)):
scale = SInt[16](13)
if (abs_input[14] == Bit(1)):
scale = SInt[16](14)
if (abs_input[15] == Bit(1)):
scale = SInt[16](15)
normmant_mul_left = SInt[16](abs_input)
normmant_mul_right = (SInt[16](1) << (SInt[16](15)-scale))
normmant_mask = SInt[16](0x7f00)
if (alu == ALU.FCnvInt2F) | (alu == ALU.FCnvExp2F):
if (scale >= 0):
normmant = BitVector[16](
(normmant_mul_left * normmant_mul_right) & normmant_mask)
else:
normmant = BitVector[16](0)

if alu == ALU.FCnvInt2F:
normmant = BitVector[16](normmant) >> 8

biased_scale = scale + 127
to_float_result = (sign | ((BitVector[16](biased_scale) << 7) & (
0xFF << 7)) | normmant)

Cin = Bit(0)
if (alu == ALU.Sub) | (alu == ALU.Sbc):
b = ~b
Expand Down Expand Up @@ -173,44 +269,7 @@ def alu(inst:Inst, a:Data, b:Data, d:Bit) -> (Data, Bit, Bit, Bit, Bit, Bit):
manta = BitVector[16]((a & 0x7F))
res, res_p = ((signa | signb) | exp_shift | manta), Bit(0)
elif alu == ALU.FCnvExp2F:
expa0 = BitVector[8](a[7:15])
biased_exp0 = SInt[9](expa0.zext(1))
unbiased_exp0 = SInt[9](biased_exp0 - SInt[9](127))
if (unbiased_exp0 < 0):
sign = BitVector[16](0x8000)
abs_exp0 = -unbiased_exp0
else:
sign = BitVector[16](0x0000)
abs_exp0 = unbiased_exp0
abs_exp = BitVector[8](abs_exp0[0:8])
scale = SInt[16](-127)
# for bit_pos in range(8):
# if (abs_exp[bit_pos]==Bit(1)):
# scale = bit_pos
if (abs_exp[0] == Bit(1)):
scale = SInt[16](0)
if (abs_exp[1] == Bit(1)):
scale = SInt[16](1)
if (abs_exp[2] == Bit(1)):
scale = SInt[16](2)
if (abs_exp[3] == Bit(1)):
scale = SInt[16](3)
if (abs_exp[4] == Bit(1)):
scale = SInt[16](4)
if (abs_exp[5] == Bit(1)):
scale = SInt[16](5)
if (abs_exp[6] == Bit(1)):
scale = SInt[16](6)
if (abs_exp[7] == Bit(1)):
scale = SInt[16](7)
if (scale >= 0):
normmant = BitVector[16](
(SInt[16](abs_exp) * (SInt[16](1) << (SInt[16](7)-scale))) & 0x7F)
else:
normmant = BitVector[16](0)
biased_scale = scale + 127
res, res_p = (sign | ((BitVector[16](biased_scale) << 7) & (
0xFF << 7)) | normmant), Bit(0)
res, res_p = to_float_result, Bit(0)
elif alu == ALU.FGetFInt:
signa = BitVector[16]((a & 0x8000))
manta = BitVector[16]((a & 0x7F)) | 0x80
Expand Down Expand Up @@ -252,58 +311,7 @@ def alu(inst:Inst, a:Data, b:Data, d:Bit) -> (Data, Bit, Bit, Bit, Bit, Bit):
# We are not checking for overflow when converting to int
res, res_p = signed_res, Bit(0)
elif alu == ALU.FCnvInt2F:
if signed == Signed.signed:
sign = BitVector[16]((a) & 0x8000)
else:
sign = BitVector[16](0)
if (sign[15] == Bit(1)):
abs_input = BitVector[16](-a)
else:
abs_input = BitVector[16](a)
scale = SInt[16](-127)
# for bit_pos in range(8):
# if (abs_exp[bit_pos]==Bit(1)):
# scale = bit_pos
if (abs_input[0] == Bit(1)):
scale = SInt[16](0)
if (abs_input[1] == Bit(1)):
scale = SInt[16](1)
if (abs_input[2] == Bit(1)):
scale = SInt[16](2)
if (abs_input[3] == Bit(1)):
scale = SInt[16](3)
if (abs_input[4] == Bit(1)):
scale = SInt[16](4)
if (abs_input[5] == Bit(1)):
scale = SInt[16](5)
if (abs_input[6] == Bit(1)):
scale = SInt[16](6)
if (abs_input[7] == Bit(1)):
scale = SInt[16](7)
if (abs_input[8] == Bit(1)):
scale = SInt[16](8)
if (abs_input[9] == Bit(1)):
scale = SInt[16](9)
if (abs_input[10] == Bit(1)):
scale = SInt[16](10)
if (abs_input[11] == Bit(1)):
scale = SInt[16](11)
if (abs_input[12] == Bit(1)):
scale = SInt[16](12)
if (abs_input[13] == Bit(1)):
scale = SInt[16](13)
if (abs_input[14] == Bit(1)):
scale = SInt[16](14)
if (abs_input[15] == Bit(1)):
scale = SInt[16](15)
if (scale >= 0):
normmant = BitVector[16](
(SInt[16](abs_input) * (SInt[16](1) << (SInt[16](15)-scale))) & 0x7F00)
else:
normmant = BitVector[16](0)
biased_scale = scale + 127
res, res_p = (sign | ((BitVector[16](biased_scale) << 7) & (
0xFF << 7)) | (BitVector[16](normmant) >> 8), Bit(0))
res, res_p = to_float_result, Bit(0)

# else:
# raise NotImplementedError(alu)
Expand Down

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