Skip to content

How .sdc is related to synthesis? #788

Closed Answered by maliberty
tristonw109 asked this question in Q&A
Discussion options

You must be logged in to vote

Synthesis will get information about the clock and i/o timings. Its primarily used during techmapping and optimization which is done by abc from within yosys.

Replies: 2 comments

Comment options

You must be logged in to vote
0 replies
Answer selected by tristonw109
Comment options

You must be logged in to vote
0 replies
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Category
Q&A
Labels
None yet
2 participants