implement TIP 0001: Contiguity Argument for Memory Consistency #80
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jan-ferdinand
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Oct 7, 2022
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jan-ferdinand
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- implement TIP 0001, fix Implement TIP 0001: Contiguity Argument for Memory Consistency #77
- update specification of RAM Table
- update cheat sheet
jan-ferdinand
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Oct 7, 2022
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Fix #77 Co-authored-by: Alexander Lemmens <alexanderlemmens@hotmail.com>
- Introduce register `ramp`, which is updated on executing instructions
`read_mem` & `write_mem`.
- Explicitly treat clock jump differences of magnitude 1.
- Also, make running evaluation `reu` absorb first (not last) cell of
every contiguous region.
- Adapt figure accordingly.
- Improve wording regarding forward / backward directed jumps.
doesn't work yet
Co-authored-by: Ferdinand Sauer <ferdinand@neptune.cash>
Also: - clean up depracated comments
Also: - add eighth instruction bit column - rename KeepRamp -> KeepRam - fix off-by-one error in OpStack - add constraints for generic instruction buckets - add constraints for KeepRam - update ramv in VM correctly - catch error in test hash_table::table_satisfies_constraints_test - add initial boundary constraint on ramp Co-authored-by: Ferdinand Sauer <ferdinand@neptune.cash>
aszepieniec
approved these changes
Oct 18, 2022
5 tasks
implement TIP 0003: Subset Argument for Memory Consistency
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