forked from enjoy-digital/litex
-
Notifications
You must be signed in to change notification settings - Fork 0
Build your hardware, easily!
License
Uatcodewarroir/litex
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Folders and files
Name | Name | Last commit message | Last commit date | |
---|---|---|---|---|
Repository files navigation
__ _ __ _ __ / / (_) /____ | |/_/ / /__/ / __/ -_)> < /____/_/\__/\__/_/|_| Migen inside Build your hardware, easily! Copyright 2012-2016 Enjoy-Digital [> Intro --------- LiteX is an alternative to Migen/MiSoC maintained and used by Enjoy-Digital to build our cores, integrate them in complete SoC and load/flash them to the hardware and experiment new features. The structure of LiteX is kept close to Migen/MiSoC to ease collaboration between projects and efforts are made to keep cores developed with LiteX compatible with Migen/MiSoC. [> License ----------- LiteX is Copyright (c) 2012-2015 Enjoy-Digital under BSD Lisense. Since it is based on Migen/MiSoC, please also refer to LICENSE file in gen/soc directory or git history to get correct copyrights. [> Sub-packages ---------------- gen: Provides specific or experimentatl modules to generate HDL that are not integrated in Migen. build: Provides tools to build FPGA bitstreams (interface to vendor toolchains) and to simulate HDL code or full SoCs. soc: Provides definitions/modules to build cores (bus, bank, flow), cores and tools to build a SoC from such cores. boards: Provides platforms and targets for the supported boards. [> Quick start guide -------------------- 0. If cloned from Git without the --recursive option, get the submodules: git submodule update --init 1. Install Python 3.3+, Migen and FPGA vendor's development tools and JTAG tools. Get Migen from: https://github.com/m-labs/migen 2. Compile and install binutils. Take the latest version from GNU. mkdir build && cd build ../configure --target=lm32-elf make make install 3. (Optional, only if you want to use a lm32 CPU in you SoC) Compile and install GCC. Take gcc-core and gcc-g++ from GNU (version 4.5 or >=4.9). rm -rf libstdc++-v3 mkdir build && cd build ../configure --target=lm32-elf --enable-languages="c,c++" --disable-libgcc \ --disable-libssp make make install 4. Build the target of your board...: Go to boards/targets and execute the target you want to build 5. ... and/or install Verilator and test LiteX on your computer: Download and install Verilator: http://www.veripool.org/ Go to boards/targets ./sim.py 6. Run a terminal program on the board's serial port at 115200 8-N-1. You should get the BIOS prompt. [> Contact E-mail: florent [AT] enjoy-digital.fr
About
Build your hardware, easily!
Resources
License
Stars
Watchers
Forks
Releases
No releases published
Languages
- Python 57.7%
- C 21.2%
- C++ 18.5%
- Assembly 1.4%
- Other 1.2%