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Total cols must be divisible by 2 #137

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IanBoyanZhang opened this issue Apr 17, 2022 · 2 comments
Closed

Total cols must be divisible by 2 #137

IanBoyanZhang opened this issue Apr 17, 2022 · 2 comments

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@IanBoyanZhang
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IanBoyanZhang commented Apr 17, 2022

Hello,

Thanks for taking time to look into this issue.
I am attempting to follow the config template running it with sky130 tech config, but got below error.

Characterization is disabled (using analytical delay models) (analytical_delay=False to simulate).
ERROR: file sram_config.py: line 132: Invalid number of cols including rbl(s): 257. Total cols must be divisible by 2

The config used is

# Data word size
word_size = 32

# Number of words in the memory
num_words = 1024

# Technology to use in $OPENRAM_TECH
tech_name = "sky130"

# You can use the technology nominal corner only
# nominal_corner_only = True

process_corners = ["SS", "TT", "FF"]
# process_corners = ["TT"]

# Voltage corners to characterize
supply_voltages = [ 1.8 ]
# supply_voltages = [ 3.0, 3.3, 3.5 ]

# Temperature corners to characterize
# temperatures = [ 0, 25 100]

# Output directory for the results
output_path = "temp"
# Output file base name
output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)

# Disable analytical models for full characterization (WARNING: slow!)
# analytical_delay = False

Debug output

Technology: sky130
Total size: 32768 bits
WARNING: file globals.py: line 633: Characterizing large memories (32768) will have a large run-time. 
Word size: 32
Words: 1024
Banks: 1
Write size: None
RW ports: 1
R-only ports: 0
W-only ports: 0
DRC/LVS/PEX is only run on the top-level design to save run-time (inline_lvsdrc=True to do inline checking).
DRC/LVS/PEX is disabled (check_lvsdrc=True to enable).
Performing simulation-based characterization with ngspice
Trimming netlist to speed up characterization (trim_netlist=False to disable).
ERROR: file sram_config.py: line 132: Invalid number of cols including rbl(s): 257. Total cols must be divisible by 2

Thank you!

@mguthaus
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Due to the bitcell lithography, sky130 requires an even number of rows and columns for the single port macros. We also use a dummy row and replica column for timing so this adds one of each. To even it out, you need to add a spare row and column with:
num_spare_cols=1
num_spare_rows=1

@IanBoyanZhang
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Thank you!

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