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[FP16] Implement relation operations. (#6825)
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Specified at
https://github.com/WebAssembly/half-precision/blob/main/proposals/half-precision/Overview.md
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@brendandahl
brendandahl committed Aug 9, 2024
1 parent d945aa4 commit b3e22d2
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Showing 16 changed files with 435 additions and 33 deletions.
6 changes: 6 additions & 0 deletions scripts/gen-s-parser.py
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Expand Up @@ -343,6 +343,12 @@
("i64x2.gt_s", "makeBinary(BinaryOp::GtSVecI64x2)"),
("i64x2.le_s", "makeBinary(BinaryOp::LeSVecI64x2)"),
("i64x2.ge_s", "makeBinary(BinaryOp::GeSVecI64x2)"),
("f16x8.eq", "makeBinary(BinaryOp::EqVecF16x8)"),
("f16x8.ne", "makeBinary(BinaryOp::NeVecF16x8)"),
("f16x8.lt", "makeBinary(BinaryOp::LtVecF16x8)"),
("f16x8.gt", "makeBinary(BinaryOp::GtVecF16x8)"),
("f16x8.le", "makeBinary(BinaryOp::LeVecF16x8)"),
("f16x8.ge", "makeBinary(BinaryOp::GeVecF16x8)"),
("f32x4.eq", "makeBinary(BinaryOp::EqVecF32x4)"),
("f32x4.ne", "makeBinary(BinaryOp::NeVecF32x4)"),
("f32x4.lt", "makeBinary(BinaryOp::LtVecF32x4)"),
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57 changes: 54 additions & 3 deletions src/gen-s-parser.inc
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Expand Up @@ -309,9 +309,60 @@ switch (buf[0]) {
switch (buf[1]) {
case '1': {
switch (buf[6]) {
case 'e':
if (op == "f16x8.extract_lane"sv) {
CHECK_ERR(makeSIMDExtract(ctx, pos, annotations, SIMDExtractOp::ExtractLaneVecF16x8, 8));
case 'e': {
switch (buf[7]) {
case 'q':
if (op == "f16x8.eq"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::EqVecF16x8));
return Ok{};
}
goto parse_error;
case 'x':
if (op == "f16x8.extract_lane"sv) {
CHECK_ERR(makeSIMDExtract(ctx, pos, annotations, SIMDExtractOp::ExtractLaneVecF16x8, 8));
return Ok{};
}
goto parse_error;
default: goto parse_error;
}
}
case 'g': {
switch (buf[7]) {
case 'e':
if (op == "f16x8.ge"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::GeVecF16x8));
return Ok{};
}
goto parse_error;
case 't':
if (op == "f16x8.gt"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::GtVecF16x8));
return Ok{};
}
goto parse_error;
default: goto parse_error;
}
}
case 'l': {
switch (buf[7]) {
case 'e':
if (op == "f16x8.le"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::LeVecF16x8));
return Ok{};
}
goto parse_error;
case 't':
if (op == "f16x8.lt"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::LtVecF16x8));
return Ok{};
}
goto parse_error;
default: goto parse_error;
}
}
case 'n':
if (op == "f16x8.ne"sv) {
CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::NeVecF16x8));
return Ok{};
}
goto parse_error;
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6 changes: 6 additions & 0 deletions src/ir/child-typer.h
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Expand Up @@ -558,6 +558,12 @@ template<typename Subtype> struct ChildTyper : OverriddenVisitor<Subtype> {
case LeSVecI64x2:
case GtSVecI64x2:
case GeSVecI64x2:
case EqVecF16x8:
case NeVecF16x8:
case LtVecF16x8:
case LeVecF16x8:
case GtVecF16x8:
case GeVecF16x8:
case EqVecF32x4:
case NeVecF32x4:
case LtVecF32x4:
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6 changes: 6 additions & 0 deletions src/ir/cost.h
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Expand Up @@ -398,6 +398,12 @@ struct CostAnalyzer : public OverriddenVisitor<CostAnalyzer, CostType> {
case LeSVecI64x2:
case GtSVecI64x2:
case GeSVecI64x2:
case EqVecF16x8:
case NeVecF16x8:
case LtVecF16x8:
case LeVecF16x8:
case GtVecF16x8:
case GeVecF16x8:
case EqVecF32x4:
case NeVecF32x4:
case LtVecF32x4:
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6 changes: 6 additions & 0 deletions src/literal.h
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Expand Up @@ -509,6 +509,12 @@ class Literal {
Literal gtSI64x2(const Literal& other) const;
Literal leSI64x2(const Literal& other) const;
Literal geSI64x2(const Literal& other) const;
Literal eqF16x8(const Literal& other) const;
Literal neF16x8(const Literal& other) const;
Literal ltF16x8(const Literal& other) const;
Literal gtF16x8(const Literal& other) const;
Literal leF16x8(const Literal& other) const;
Literal geF16x8(const Literal& other) const;
Literal eqF32x4(const Literal& other) const;
Literal neF32x4(const Literal& other) const;
Literal ltF32x4(const Literal& other) const;
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18 changes: 18 additions & 0 deletions src/passes/Print.cpp
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Expand Up @@ -1689,6 +1689,24 @@ struct PrintExpressionContents
case GeSVecI64x2:
o << "i64x2.ge_s";
break;
case EqVecF16x8:
o << "f16x8.eq";
break;
case NeVecF16x8:
o << "f16x8.ne";
break;
case LtVecF16x8:
o << "f16x8.lt";
break;
case GtVecF16x8:
o << "f16x8.gt";
break;
case LeVecF16x8:
o << "f16x8.le";
break;
case GeVecF16x8:
o << "f16x8.ge";
break;
case EqVecF32x4:
o << "f32x4.eq";
break;
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7 changes: 7 additions & 0 deletions src/tools/fuzzing/fuzzing.cpp
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Expand Up @@ -3288,6 +3288,13 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
LeUVecI32x4,
GeSVecI32x4,
GeUVecI32x4,
EqVecF16x8,
EqVecF16x8,
NeVecF16x8,
LtVecF16x8,
GtVecF16x8,
LeVecF16x8,
GeVecF16x8,

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@tlively

tlively Aug 10, 2024

Member

@brendandahl Looks like this is causing fuzzer failures because V8 can't execute these yet. (At least the latest V8 available from JSVU can't.)

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@tlively

tlively Aug 10, 2024

Member

Also, even if V8 could execute these, they should still be gated by the fp16 feature being enabled. It looks like we don't have a feature flag for it yet?
EqVecF32x4,
NeVecF32x4,
LtVecF32x4,
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6 changes: 6 additions & 0 deletions src/wasm-binary.h
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Expand Up @@ -1057,6 +1057,12 @@ enum ASTNodes {
F16x8Splat = 0x120,
F16x8ExtractLane = 0x121,
F16x8ReplaceLane = 0x122,
F16x8Eq = 0x137,
F16x8Ne = 0x138,
F16x8Lt = 0x139,
F16x8Gt = 0x13a,
F16x8Le = 0x13b,
F16x8Ge = 0x13c,

// bulk memory opcodes

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12 changes: 12 additions & 0 deletions src/wasm-interpreter.h
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Expand Up @@ -864,6 +864,18 @@ class ExpressionRunner : public OverriddenVisitor<SubType, Flow> {
return left.leSI64x2(right);
case GeSVecI64x2:
return left.geSI64x2(right);
case EqVecF16x8:
return left.eqF16x8(right);
case NeVecF16x8:
return left.neF16x8(right);
case LtVecF16x8:
return left.ltF16x8(right);
case GtVecF16x8:
return left.gtF16x8(right);
case LeVecF16x8:
return left.leF16x8(right);
case GeVecF16x8:
return left.geF16x8(right);
case EqVecF32x4:
return left.eqF32x4(right);
case NeVecF32x4:
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6 changes: 6 additions & 0 deletions src/wasm.h
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Expand Up @@ -381,6 +381,12 @@ enum BinaryOp {
GtSVecI64x2,
LeSVecI64x2,
GeSVecI64x2,
EqVecF16x8,
NeVecF16x8,
LtVecF16x8,
GtVecF16x8,
LeVecF16x8,
GeVecF16x8,
EqVecF32x4,
NeVecF32x4,
LtVecF32x4,
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18 changes: 18 additions & 0 deletions src/wasm/literal.cpp
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Expand Up @@ -2209,6 +2209,24 @@ Literal Literal::geSI64x2(const Literal& other) const {
return compare<2, &Literal::getLanesI64x2, &Literal::geS, int64_t>(*this,
other);
}
Literal Literal::eqF16x8(const Literal& other) const {
return compare<8, &Literal::getLanesF16x8, &Literal::eq>(*this, other);
}
Literal Literal::neF16x8(const Literal& other) const {
return compare<8, &Literal::getLanesF16x8, &Literal::ne>(*this, other);
}
Literal Literal::ltF16x8(const Literal& other) const {
return compare<8, &Literal::getLanesF16x8, &Literal::lt>(*this, other);
}
Literal Literal::gtF16x8(const Literal& other) const {
return compare<8, &Literal::getLanesF16x8, &Literal::gt>(*this, other);
}
Literal Literal::leF16x8(const Literal& other) const {
return compare<8, &Literal::getLanesF16x8, &Literal::le>(*this, other);
}
Literal Literal::geF16x8(const Literal& other) const {
return compare<8, &Literal::getLanesF16x8, &Literal::ge>(*this, other);
}
Literal Literal::eqF32x4(const Literal& other) const {
return compare<4, &Literal::getLanesF32x4, &Literal::eq>(*this, other);
}
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24 changes: 24 additions & 0 deletions src/wasm/wasm-binary.cpp
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Expand Up @@ -5846,6 +5846,30 @@ bool WasmBinaryReader::maybeVisitSIMDBinary(Expression*& out, uint32_t code) {
curr = allocator.alloc<Binary>();
curr->op = GeSVecI64x2;
break;
case BinaryConsts::F16x8Eq:
curr = allocator.alloc<Binary>();
curr->op = EqVecF16x8;
break;
case BinaryConsts::F16x8Ne:
curr = allocator.alloc<Binary>();
curr->op = NeVecF16x8;
break;
case BinaryConsts::F16x8Lt:
curr = allocator.alloc<Binary>();
curr->op = LtVecF16x8;
break;
case BinaryConsts::F16x8Gt:
curr = allocator.alloc<Binary>();
curr->op = GtVecF16x8;
break;
case BinaryConsts::F16x8Le:
curr = allocator.alloc<Binary>();
curr->op = LeVecF16x8;
break;
case BinaryConsts::F16x8Ge:
curr = allocator.alloc<Binary>();
curr->op = GeVecF16x8;
break;
case BinaryConsts::F32x4Eq:
curr = allocator.alloc<Binary>();
curr->op = EqVecF32x4;
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18 changes: 18 additions & 0 deletions src/wasm/wasm-stack.cpp
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Expand Up @@ -1643,6 +1643,24 @@ void BinaryInstWriter::visitBinary(Binary* curr) {
case GeSVecI64x2:
o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::I64x2GeS);
break;
case EqVecF16x8:
o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Eq);
break;
case NeVecF16x8:
o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Ne);
break;
case LtVecF16x8:
o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Lt);
break;
case GtVecF16x8:
o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Gt);
break;
case LeVecF16x8:
o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Le);
break;
case GeVecF16x8:
o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Ge);
break;
case EqVecF32x4:
o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F32x4Eq);
break;
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6 changes: 6 additions & 0 deletions src/wasm/wasm-validator.cpp
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Expand Up @@ -1743,6 +1743,12 @@ void FunctionValidator::visitBinary(Binary* curr) {
case LeSVecI64x2:
case GtSVecI64x2:
case GeSVecI64x2:
case EqVecF16x8:
case NeVecF16x8:
case LtVecF16x8:
case LeVecF16x8:
case GtVecF16x8:
case GeVecF16x8:
case EqVecF32x4:
case NeVecF32x4:
case LtVecF32x4:
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