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Add fence instruction and encoding to overview #141
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proposals/threads/Overview.md
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The fence operator, `atomic.fence`, takes no operands, and returns nothing. It is intended to preserve the semantics of the [fence operators of higher-level languages](https://en.cppreference.com/w/cpp/atomic/atomic_thread_fence). | ||
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Unlike other atomic operators, `atomic.fence` does not target a particular linear memory, and it is therefore *not* a validation error for this operator to be used in a module that does not declare a shared memory. |
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nit: I assume it's also OK to be used in a module that declares no memory at all.
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yes; clarified this
Is there anything I can do to move this forward? I've addressed previous comments. |
@binji, can you review too? |
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sorry, reviewed earlier but didn't approve
This adds decoding and compilation of the "atomic.fence" operator, which is intended to preserve the synchronization guarantees of higher-level languages. Unlike other atomic operators, it does not target a particular linear memory. It may occur in modules which declare no memory, or a non-shared memory, without causing a validation error. See proposal: WebAssembly/threads#141 See discussion: WebAssembly/threads#140 R=clemensh@chromium.org TEST=cctest/test-run-wasm-atomics/RunWasmXXX_AtomicFence BUG=v8:9452 Change-Id: Ibf7e46227f7edfe5c81c097cfc15924c59614067 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1701856 Commit-Queue: Michael Starzinger <mstarzinger@chromium.org> Reviewed-by: Clemens Hammacher <clemensh@chromium.org> Reviewed-by: Deepti Gandluri <gdeepti@chromium.org> Cr-Commit-Position: refs/heads/master@{#62821}
port 4ca8b4d https://crrev.com/c/1701856 Original Commit Message: This adds decoding and compilation of the "atomic.fence" operator, which is intended to preserve the synchronization guarantees of higher-level languages. Unlike other atomic operators, it does not target a particular linear memory. It may occur in modules which declare no memory, or a non-shared memory, without causing a validation error. See proposal: WebAssembly/threads#141 See discussion: WebAssembly/threads#140 Change-Id: Ia60d58a6bf58e8236591d515d30184418cee47c5 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1710337 Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Commit-Queue: Yu Yin <xwafish@gmail.com> Cr-Commit-Position: refs/heads/master@{#62843}
Port 4ca8b4d Original Commit Message: This adds decoding and compilation of the "atomic.fence" operator, which is intended to preserve the synchronization guarantees of higher-level languages. Unlike other atomic operators, it does not target a particular linear memory. It may occur in modules which declare no memory, or a non-shared memory, without causing a validation error. See proposal: WebAssembly/threads#141 See discussion: WebAssembly/threads#140 R=mstarzinger@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG=v8:9452 LOG=N Change-Id: Ib8ad24e65154d7555a47e537f81110be47f4d4de Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1710620 Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com> Reviewed-by: Junliang Yan <jyan@ca.ibm.com> Reviewed-by: Michael Starzinger <mstarzinger@chromium.org> Cr-Commit-Position: refs/heads/master@{#62850}
This commit implements the 'atomic.fence' Wasm instruction. Issue: WebAssembly/threads#140 Overview: WebAssembly/threads#141 The instruction is encoded as, 0xFE 0x03, with a reserved byte trailing for a future memory order immediate. The instruction is implemented by emitting a memoryBarrier through the macro assembler. Differential Revision: https://phabricator.services.mozilla.com/D39264 --HG-- extra : moz-landing-system : lando
This commit implements the 'atomic.fence' Wasm instruction. Issue: WebAssembly/threads#140 Overview: WebAssembly/threads#141 The instruction is encoded as, 0xFE 0x03, with a reserved byte trailing for a future memory order immediate. The instruction is implemented by emitting a memoryBarrier through the macro assembler. Differential Revision: https://phabricator.services.mozilla.com/D39264
This commit implements the 'atomic.fence' Wasm instruction. Issue: WebAssembly/threads#140 Overview: WebAssembly/threads#141 The instruction is encoded as, 0xFE 0x03, with a reserved byte trailing for a future memory order immediate. The instruction is implemented by emitting a memoryBarrier through the macro assembler. Differential Revision: https://phabricator.services.mozilla.com/D39264 UltraBlame original commit: d32c27f13f21b0927cbfb7ce6f8509c0dea6bf09
This commit implements the 'atomic.fence' Wasm instruction. Issue: WebAssembly/threads#140 Overview: WebAssembly/threads#141 The instruction is encoded as, 0xFE 0x03, with a reserved byte trailing for a future memory order immediate. The instruction is implemented by emitting a memoryBarrier through the macro assembler. Differential Revision: https://phabricator.services.mozilla.com/D39264 UltraBlame original commit: d32c27f13f21b0927cbfb7ce6f8509c0dea6bf09
This commit implements the 'atomic.fence' Wasm instruction. Issue: WebAssembly/threads#140 Overview: WebAssembly/threads#141 The instruction is encoded as, 0xFE 0x03, with a reserved byte trailing for a future memory order immediate. The instruction is implemented by emitting a memoryBarrier through the macro assembler. Differential Revision: https://phabricator.services.mozilla.com/D39264 UltraBlame original commit: d32c27f13f21b0927cbfb7ce6f8509c0dea6bf09
See WebAssembly/threads#141 for the binary encoding. This patch does add a field to AtomicFenceExpr for the consistency model, though without a type for the time being.
See WebAssembly/threads#141 for the binary encoding. This patch does add a field to AtomicFenceExpr for the consistency model, though without a type for the time being.
See WebAssembly/threads#141 for the binary encoding. This patch does add a field to AtomicFenceExpr for the consistency model, though without a type for the time being.
atomic.fence was added to the threads proposal in WebAssembly/threads#141, and supported in wabt in WebAssembly/wabt@d041025#diff-25d902c24283ab8cfbac54dfa101ad31.
atomic.fence was added to the threads proposal in WebAssembly/threads#141, and supported in wabt in WebAssembly/wabt@d041025#diff-25d902c24283ab8cfbac54dfa101ad31.
This commit implements the 'atomic.fence' Wasm instruction. Issue: WebAssembly/threads#140 Overview: WebAssembly/threads#141 The instruction is encoded as, 0xFE 0x03, with a reserved byte trailing for a future memory order immediate. The instruction is implemented by emitting a memoryBarrier through the macro assembler. Differential Revision: https://phabricator.services.mozilla.com/D39264
Following #140