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Merge pull request #3671 from zachjs/master
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Add test for typenames using constants shadowed later on
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jix committed Feb 15, 2023
2 parents 53bda9d + 26a6c60 commit 68480df
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12 changes: 12 additions & 0 deletions tests/verilog/typedef_const_shadow.sv
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module top;
localparam W = 5;
typedef logic [W-1:0] T;
T x; // width 5
if (1) begin : blk
localparam W = 10;
typedef T U;
typedef logic [W-1:0] V;
U y; // width 5
V z; // width 10
end
endmodule
4 changes: 4 additions & 0 deletions tests/verilog/typedef_const_shadow.ys
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read_verilog -sv typedef_const_shadow.sv
select -assert-count 1 w:x s:5 %i
select -assert-count 1 w:blk.y s:5 %i
select -assert-count 1 w:blk.z s:10 %i

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