Missed a reg v wire in hwbfly, on longmpy

ZipCPU · Nov 30, 2019 · 85986ee · 85986ee
1 parent d6b8d16
commit 85986ee
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/sw/butterfly.cpp b/sw/butterfly.cpp
@@ -1549,7 +1549,7 @@ SLASHLINE
 		"\t\treg			ce_phase;\n"
 "\n"
 		"\t\treg	signed	[(CWIDTH+IWIDTH+1)-1:0]	mpy_pipe_out;\n"
-		"\t\twire	signed [IWIDTH+CWIDTH+3-1:0]	longmpy;\n"
+		"\t\treg	signed [IWIDTH+CWIDTH+3-1:0]	longmpy;\n"
 "\n"
 "\n"
 		"\t\tinitial	ce_phase = 1'b1;\n"