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target-microblaze: Refactor debug output macros
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Make debug output compile-testable even if disabled.

Drop unused D(x) macros.

Signed-off-by: Andreas Färber <afaerber@suse.de>
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@afaerber
afaerber committed Jan 27, 2013
1 parent 322759b commit 35bf538
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Showing 4 changed files with 40 additions and 26 deletions.
25 changes: 18 additions & 7 deletions target-microblaze/helper.c
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Original file line number Diff line number Diff line change
Expand Up @@ -21,8 +21,19 @@
#include "cpu.h"
#include "qemu/host-utils.h"

#define D(x)
#define DMMU(x)
#define DEBUG_MB 0
#define DEBUG_MB_MMU 0

#define D_LOG(...) G_STMT_START \
if (DEBUG_MB) { \
qemu_log(__VA_ARGS__); \
} \
G_STMT_END
#define MMU_LOG(...) G_STMT_START \
if (DEBUG_MB_MMU) { \
qemu_log(__VA_ARGS__); \
} \
G_STMT_END

#if defined(CONFIG_USER_ONLY)

Expand Down Expand Up @@ -70,13 +81,13 @@ int cpu_mb_handle_mmu_fault (CPUMBState *env, target_ulong address, int rw,
vaddr = address & TARGET_PAGE_MASK;
paddr = lu.paddr + vaddr - lu.vaddr;

DMMU(qemu_log("MMU map mmu=%d v=%x p=%x prot=%x\n",
mmu_idx, vaddr, paddr, lu.prot));
MMU_LOG("MMU map mmu=%d v=%x p=%x prot=%x\n",
mmu_idx, vaddr, paddr, lu.prot);
tlb_set_page(env, vaddr, paddr, lu.prot, mmu_idx, TARGET_PAGE_SIZE);
r = 0;
} else {
env->sregs[SR_EAR] = address;
DMMU(qemu_log("mmu=%d miss v=%x\n", mmu_idx, address));
MMU_LOG("mmu=%d miss v=%x\n", mmu_idx, address);

switch (lu.err) {
case ERR_PROT:
Expand Down Expand Up @@ -156,7 +167,7 @@ void do_interrupt(CPUMBState *env)
env->sregs[SR_ESR] &= ~(1 << 12);
/* Exception breaks branch + dslot sequence? */
if (env->iflags & D_FLAG) {
D(qemu_log("D_FLAG set at exception bimm=%d\n", env->bimm));
D_LOG("D_FLAG set at exception bimm=%d\n", env->bimm);
env->sregs[SR_ESR] |= 1 << 12 ;
env->sregs[SR_BTR] = env->btarget;

Expand All @@ -171,7 +182,7 @@ void do_interrupt(CPUMBState *env)
log_cpu_state_mask(CPU_LOG_INT, env, 0);
}
} else if (env->iflags & IMM_FLAG) {
D(qemu_log("IMM_FLAG set at exception\n"));
D_LOG("IMM_FLAG set at exception\n");
env->regs[17] -= 4;
}

Expand Down
28 changes: 17 additions & 11 deletions target-microblaze/mmu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,13 @@

#include "cpu.h"

#define D(x)
#define DEBUG_MB 0

#define D_LOG(...) G_STMT_START \
if (DEBUG_MB) { \
qemu_log(__VA_ARGS__); \
} \
G_STMT_END

static unsigned int tlb_decode_size(unsigned int f)
{
Expand Down Expand Up @@ -87,7 +93,7 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,

/* Lookup and decode. */
t = mmu->rams[RAM_TAG][i];
D(qemu_log("TLB %d valid=%d\n", i, t & TLB_VALID));
D_LOG("TLB %d valid=%d\n", i, t & TLB_VALID);
if (t & TLB_VALID) {
tlb_size = tlb_decode_size((t & TLB_PAGESZ_MASK) >> 7);
if (tlb_size < TARGET_PAGE_SIZE) {
Expand All @@ -98,14 +104,14 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,
mask = ~(tlb_size - 1);
tlb_tag = t & TLB_EPN_MASK;
if ((vaddr & mask) != (tlb_tag & mask)) {
D(qemu_log("TLB %d vaddr=%x != tag=%x\n",
i, vaddr & mask, tlb_tag & mask));
D_LOG("TLB %d vaddr=%x != tag=%x\n",
i, vaddr & mask, tlb_tag & mask);
continue;
}
if (mmu->tids[i]
&& ((mmu->regs[MMU_R_PID] & 0xff) != mmu->tids[i])) {
D(qemu_log("TLB %d pid=%x != tid=%x\n",
i, mmu->regs[MMU_R_PID], mmu->tids[i]));
D_LOG("TLB %d pid=%x != tid=%x\n",
i, mmu->regs[MMU_R_PID], mmu->tids[i]);
continue;
}

Expand Down Expand Up @@ -170,8 +176,8 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,
}
}
done:
D(qemu_log("MMU vaddr=%x rw=%d tlb_wr=%d tlb_ex=%d hit=%d\n",
vaddr, rw, tlb_wr, tlb_ex, hit));
D_LOG("MMU vaddr=%x rw=%d tlb_wr=%d tlb_ex=%d hit=%d\n",
vaddr, rw, tlb_wr, tlb_ex, hit);
return hit;
}

Expand Down Expand Up @@ -212,14 +218,14 @@ uint32_t mmu_read(CPUMBState *env, uint32_t rn)
r = env->mmu.regs[rn];
break;
}
D(qemu_log("%s rn=%d=%x\n", __func__, rn, r));
D_LOG("%s rn=%d=%x\n", __func__, rn, r);
return r;
}

void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
{
unsigned int i;
D(qemu_log("%s rn=%d=%x old=%x\n", __func__, rn, v, env->mmu.regs[rn]));
D_LOG("%s rn=%d=%x old=%x\n", __func__, rn, v, env->mmu.regs[rn]);

if (env->mmu.c_mmu < 2 || !env->mmu.c_mmu_tlb_access) {
qemu_log("MMU access on MMU-less system\n");
Expand All @@ -240,7 +246,7 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
}
env->mmu.rams[rn & 1][i] = v;

D(qemu_log("%s ram[%d][%d]=%x\n", __func__, rn & 1, i, v));
D_LOG("%s ram[%d][%d]=%x\n", __func__, rn & 1, i, v);
break;
case MMU_R_ZPR:
if (env->mmu.c_mmu_tlb_access <= 1) {
Expand Down
2 changes: 0 additions & 2 deletions target-microblaze/op_helper.c
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Original file line number Diff line number Diff line change
Expand Up @@ -23,8 +23,6 @@
#include "helper.h"
#include "qemu/host-utils.h"

#define D(x)

#if !defined(CONFIG_USER_ONLY)
#include "exec/softmmu_exec.h"

Expand Down
11 changes: 5 additions & 6 deletions target-microblaze/translate.c
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Original file line number Diff line number Diff line change
Expand Up @@ -30,13 +30,12 @@
#define SIM_COMPAT 0
#define DISAS_GNU 1
#define DISAS_MB 1
#if DISAS_MB && !SIM_COMPAT
# define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
#else
# define LOG_DIS(...) do { } while (0)
#endif

#define D(x)
#define LOG_DIS(...) G_STMT_START \
if (DISAS_MB && !SIM_COMPAT) { \
qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__); \
} \
G_STMT_END

#define EXTRACT_FIELD(src, start, end) \
(((src) >> start) & ((1 << (end - start + 1)) - 1))
Expand Down

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