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Adding STM32L071CXCTX as a generic target to be extended. This addition required to fix some issues on stml0 library
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...ARGET_STM/TARGET_STM32L0/TARGET_STM32L071CXCTX/device/TOOLCHAIN_ARM/startup_stm32l073xx.S
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;******************** (C) COPYRIGHT 2016 STMicroelectronics ******************** | ||
;* File Name : startup_stm32l073xx.s | ||
;* Author : MCD Application Team | ||
;* Version : V1.7.1 | ||
;* Date : 25-November-2016 | ||
;* Description : STM32l073xx Devices vector table for MDK-ARM toolchain. | ||
;* This module performs: | ||
;* - Set the initial SP | ||
;* - Set the initial PC == Reset_Handler | ||
;* - Set the vector table entries with the exceptions ISR address | ||
;* - Branches to __main in the C library (which eventually | ||
;* calls main()). | ||
;* After Reset the Cortex-M0+ processor is in Thread mode, | ||
;* priority is Privileged, and the Stack is set to Main. | ||
;******************************************************************************* | ||
;* | ||
;* Redistribution and use in source and binary forms, with or without modification, | ||
;* are permitted provided that the following conditions are met: | ||
;* 1. Redistributions of source code must retain the above copyright notice, | ||
;* this list of conditions and the following disclaimer. | ||
;* 2. Redistributions in binary form must reproduce the above copyright notice, | ||
;* this list of conditions and the following disclaimer in the documentation | ||
;* and/or other materials provided with the distribution. | ||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors | ||
;* may be used to endorse or promote products derived from this software | ||
;* without specific prior written permission. | ||
;* | ||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | ||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | ||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | ||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | ||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
;* | ||
;******************************************************************************* | ||
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PRESERVE8 | ||
THUMB | ||
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; Vector Table Mapped to Address 0 at Reset | ||
AREA RESET, DATA, READONLY | ||
EXPORT __Vectors | ||
EXPORT __Vectors_End | ||
EXPORT __Vectors_Size | ||
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit| | ||
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__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack | ||
DCD Reset_Handler ; Reset Handler | ||
DCD NMI_Handler ; NMI Handler | ||
DCD HardFault_Handler ; Hard Fault Handler | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD SVC_Handler ; SVCall Handler | ||
DCD 0 ; Reserved | ||
DCD 0 ; Reserved | ||
DCD PendSV_Handler ; PendSV Handler | ||
DCD SysTick_Handler ; SysTick Handler | ||
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; External Interrupts | ||
DCD WWDG_IRQHandler ; Window Watchdog | ||
DCD PVD_IRQHandler ; PVD through EXTI Line detect | ||
DCD RTC_IRQHandler ; RTC through EXTI Line | ||
DCD FLASH_IRQHandler ; FLASH | ||
DCD RCC_CRS_IRQHandler ; RCC and CRS | ||
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 | ||
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 | ||
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 | ||
DCD TSC_IRQHandler ; TSC | ||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | ||
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 | ||
DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 | ||
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2 | ||
DCD LPTIM1_IRQHandler ; LPTIM1 | ||
DCD USART4_5_IRQHandler ; USART4 and USART5 | ||
DCD TIM2_IRQHandler ; TIM2 | ||
DCD TIM3_IRQHandler ; TIM3 | ||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC | ||
DCD TIM7_IRQHandler ; TIM7 | ||
DCD 0 ; Reserved | ||
DCD TIM21_IRQHandler ; TIM21 | ||
DCD I2C3_IRQHandler ; I2C3 | ||
DCD TIM22_IRQHandler ; TIM22 | ||
DCD I2C1_IRQHandler ; I2C1 | ||
DCD I2C2_IRQHandler ; I2C2 | ||
DCD SPI1_IRQHandler ; SPI1 | ||
DCD SPI2_IRQHandler ; SPI2 | ||
DCD USART1_IRQHandler ; USART1 | ||
DCD USART2_IRQHandler ; USART2 | ||
DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1 | ||
DCD LCD_IRQHandler ; LCD | ||
DCD USB_IRQHandler ; USB | ||
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__Vectors_End | ||
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__Vectors_Size EQU __Vectors_End - __Vectors | ||
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AREA |.text|, CODE, READONLY | ||
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; Reset handler routine | ||
Reset_Handler PROC | ||
EXPORT Reset_Handler [WEAK] | ||
IMPORT __main | ||
IMPORT SystemInit | ||
LDR R0, =SystemInit | ||
BLX R0 | ||
LDR R0, =__main | ||
BX R0 | ||
ENDP | ||
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; Dummy Exception Handlers (infinite loops which can be modified) | ||
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NMI_Handler PROC | ||
EXPORT NMI_Handler [WEAK] | ||
B . | ||
ENDP | ||
HardFault_Handler\ | ||
PROC | ||
EXPORT HardFault_Handler [WEAK] | ||
B . | ||
ENDP | ||
SVC_Handler PROC | ||
EXPORT SVC_Handler [WEAK] | ||
B . | ||
ENDP | ||
PendSV_Handler PROC | ||
EXPORT PendSV_Handler [WEAK] | ||
B . | ||
ENDP | ||
SysTick_Handler PROC | ||
EXPORT SysTick_Handler [WEAK] | ||
B . | ||
ENDP | ||
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Default_Handler PROC | ||
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EXPORT WWDG_IRQHandler [WEAK] | ||
EXPORT PVD_IRQHandler [WEAK] | ||
EXPORT RTC_IRQHandler [WEAK] | ||
EXPORT FLASH_IRQHandler [WEAK] | ||
EXPORT RCC_CRS_IRQHandler [WEAK] | ||
EXPORT EXTI0_1_IRQHandler [WEAK] | ||
EXPORT EXTI2_3_IRQHandler [WEAK] | ||
EXPORT EXTI4_15_IRQHandler [WEAK] | ||
EXPORT TSC_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel1_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel2_3_IRQHandler [WEAK] | ||
EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK] | ||
EXPORT ADC1_COMP_IRQHandler [WEAK] | ||
EXPORT LPTIM1_IRQHandler [WEAK] | ||
EXPORT USART4_5_IRQHandler [WEAK] | ||
EXPORT TIM2_IRQHandler [WEAK] | ||
EXPORT TIM3_IRQHandler [WEAK] | ||
EXPORT TIM6_DAC_IRQHandler [WEAK] | ||
EXPORT TIM7_IRQHandler [WEAK] | ||
EXPORT TIM21_IRQHandler [WEAK] | ||
EXPORT TIM22_IRQHandler [WEAK] | ||
EXPORT I2C1_IRQHandler [WEAK] | ||
EXPORT I2C2_IRQHandler [WEAK] | ||
EXPORT I2C3_IRQHandler [WEAK] | ||
EXPORT SPI1_IRQHandler [WEAK] | ||
EXPORT SPI2_IRQHandler [WEAK] | ||
EXPORT USART1_IRQHandler [WEAK] | ||
EXPORT USART2_IRQHandler [WEAK] | ||
EXPORT RNG_LPUART1_IRQHandler [WEAK] | ||
EXPORT LCD_IRQHandler [WEAK] | ||
EXPORT USB_IRQHandler [WEAK] | ||
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WWDG_IRQHandler | ||
PVD_IRQHandler | ||
RTC_IRQHandler | ||
FLASH_IRQHandler | ||
RCC_CRS_IRQHandler | ||
EXTI0_1_IRQHandler | ||
EXTI2_3_IRQHandler | ||
EXTI4_15_IRQHandler | ||
TSC_IRQHandler | ||
DMA1_Channel1_IRQHandler | ||
DMA1_Channel2_3_IRQHandler | ||
DMA1_Channel4_5_6_7_IRQHandler | ||
ADC1_COMP_IRQHandler | ||
LPTIM1_IRQHandler | ||
USART4_5_IRQHandler | ||
TIM2_IRQHandler | ||
TIM3_IRQHandler | ||
TIM6_DAC_IRQHandler | ||
TIM7_IRQHandler | ||
TIM21_IRQHandler | ||
TIM22_IRQHandler | ||
I2C1_IRQHandler | ||
I2C2_IRQHandler | ||
I2C3_IRQHandler | ||
SPI1_IRQHandler | ||
SPI2_IRQHandler | ||
USART1_IRQHandler | ||
USART2_IRQHandler | ||
RNG_LPUART1_IRQHandler | ||
LCD_IRQHandler | ||
USB_IRQHandler | ||
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B . | ||
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ENDP | ||
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ALIGN | ||
END | ||
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;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
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targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L071CXCTX/device/TOOLCHAIN_ARM/stm32l073xz.sct
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#! armcc -E | ||
; Scatter-Loading Description File | ||
; | ||
; SPDX-License-Identifier: BSD-3-Clause | ||
;****************************************************************************** | ||
;* @attention | ||
;* | ||
;* Copyright (c) 2016-2020 STMicroelectronics. | ||
;* All rights reserved. | ||
;* | ||
;* This software component is licensed by ST under BSD 3-Clause license, | ||
;* the "License"; You may not use this file except in compliance with the | ||
;* License. You may obtain a copy of the License at: | ||
;* opensource.org/licenses/BSD-3-Clause | ||
;* | ||
;****************************************************************************** | ||
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#include "../cmsis_nvic.h" | ||
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#if !defined(MBED_APP_START) | ||
#define MBED_APP_START MBED_ROM_START | ||
#endif | ||
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#if !defined(MBED_APP_SIZE) | ||
#define MBED_APP_SIZE MBED_ROM_SIZE | ||
#endif | ||
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#if !defined(MBED_BOOT_STACK_SIZE) | ||
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ | ||
#define MBED_BOOT_STACK_SIZE 0x400 | ||
#endif | ||
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/* Round up VECTORS_SIZE to 8 bytes */ | ||
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) | ||
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { | ||
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { | ||
*.o (RESET, +First) | ||
*(InRoot$$Sections) | ||
.ANY (+RO) | ||
} | ||
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RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data | ||
.ANY (+RW +ZI) | ||
} | ||
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up | ||
} | ||
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ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down | ||
} | ||
} |
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