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Add a board file for Upduino v3 #221
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It has the same iCE40UP5k FPGA as the earlier Upduino versions but with an expanded GPIO connector and optional QSPI capability.
Is this ready for merging? |
I am totally happy with the situation we had to begin with (it means not all pins reachable from the Amaranth connector, but those who are missing are dedicated to SPI anyway... for I/O with the external flash). Although, if the proposed change needs to happen, it would shift the position of the first pins of the connector, and all others with it. I leave it to @crzwdjk who did a better job than I did! |
I'm okay with this as-is, in that it works fine for my purposes, but I'm not an expert on amaranth board files. |
Thanks! |
It has the same iCE40UP5k FPGA as the earlier Upduino versions but with an expanded GPIO connector and optional QSPI capability.