vendor.xilinx_{7series,ultrascale}: hierachical -> hierarchical

Signed-off-by: Robin Ole Heinemann <robin.ole.heinemann@gmail.com>
amaranth-lang · Aug 16, 2021 · 23a44f3 · 23a44f3
1 parent abb2642
commit 23a44f3
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/nmigen/vendor/xilinx_7series.py b/nmigen/vendor/xilinx_7series.py
@@ -122,7 +122,7 @@ def _part(self):
             }
             {{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}
             report_timing_summary -file {{name}}_timing_synth.rpt
-            report_utilization -hierarchical -file {{name}}_utilization_hierachical_synth.rpt
+            report_utilization -hierarchical -file {{name}}_utilization_hierarchical_synth.rpt
             report_utilization -file {{name}}_utilization_synth.rpt
             opt_design
             place_design

diff --git a/nmigen/vendor/xilinx_ultrascale.py b/nmigen/vendor/xilinx_ultrascale.py
@@ -96,7 +96,7 @@ class XilinxUltraScalePlatform(TemplatedPlatform):
             }
             {{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}
             report_timing_summary -file {{name}}_timing_synth.rpt
-            report_utilization -hierarchical -file {{name}}_utilization_hierachical_synth.rpt
+            report_utilization -hierarchical -file {{name}}_utilization_hierarchical_synth.rpt
             report_utilization -file {{name}}_utilization_synth.rpt
             opt_design
             place_design