Implement remaining core Migen features #7
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…h-lang#7) Before this commit, the bus interface of a Decoder or a Multiplexer would be created during __init__. A bus interface would always be tied to an underlying memory map. After this commit, the following changes are introduced: * The bus interface of a Decoder (or a Multiplexer) is lazily created upon request. This allows the record fields of the bus interface to be up-to-date with any address space extension that may have occured. * The memory_map attribute of a bus interface is no longer assigned during __init__. It is instead assigned externally at a later time. Decoupling the memory map from the bus interface allows a Decoder (or a Multiplexer) to first create the memory map, extend it, and then use it to create the bus interface, once requested. * Decoder.add(extend=True) (or Multiplexer.add) can be used to add a window (or resource) that would otherwise not fit inside its underlying memory map.
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Saturday Dec 15, 2018 at 12:10 GMT
Originally opened as m-labs/nmigen#6
These are:
PartArrayRecordInstanceMemoryFSMTristateThe text was updated successfully, but these errors were encountered: