Zig LLVM Target Details Generator

This project transforms information about LLVM-supported target features and CPUs into representative code for the Zig standard library.

Prereqs

• Python 3
• LLVM v9 source code
• llvm-tblgen executable

Usage

Run python3 gen.py <path-to-llvm-src-dir>. Use -h to see a list of optional arguments.

By default, the final Zig source files will be placed in a directory called out. The -output-dir <dir> option can be used to specify a custom output directory.

There is a basic blacklist file that is included in this repo. Add -blacklist blacklist.txt to the above command to use it. The blacklist.txt file contains any "features" whose definition names do not start with Feature. This generally includes feature families, processor families, sub-architectures, etc.

Progress

• Parse LLVM tablegen output.
• Resolve feature dependencies with blacklist support.
• Generate JSON files describing all details for each target arch.
• Generate Zig code describing all details for each target arch.