Fix stm32xx GPIO glitches from configuration bad order of operations #4589
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Summary
The PR fixes stm32xx GPIO glitches from GPIO configuration with bad order of operations
When I2C was initialized the SDA and SCL lines would glitch low. The Bosch BMM150 was locking up from this.
The root cause on a STM32F12 was that the IO PAD was connected and driven (by the default IP block) BEFORE the IP block (I2C) was routed to the PAD via the alternate selection mux.
The fix is two fold:
The Glitch on the unconfigure
On a Conner case testing HW stack checking this change exposed a timing related bug in the SDIO/SDMMC driver that was the result of redundant GPIO configurations dropping interrupts. This is fixed in 18d7204
Impact
STM32, STM32F7, STM32H7
Testing
Bench tested on
PX4 holybro-can-gps-v1
F4, F7, H7 HW