examples: 32-bit TAs: Fix runtime abort #118
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Thanks @b49020 ! BTW, does our CI check the execution of 32-bit TAs? |
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Refactor TAs build script code to reuse 64K section alignment hook for 32-bit TAs. This would allow linker to separate executable code from writable data and in turn fix following runtime abort with 32-bit TAs: E/TC:? 0 E/TC:? 0 User mode prefetch-abort at address 0x400410e4 (read permission fault) E/TC:? 0 esr 0x8200000f ttbr0 0x200000e1b2020 ttbr1 0x00000000 cidr 0x0 E/TC:? 0 cpu apache#1 cpsr 0x00000110 E/TC:? 0 x0 0000000000000000 x1 000000000009e850 E/TC:? 0 x2 0000000040015f80 x3 0000000000000000 E/TC:? 0 x4 0000000000000000 x5 0000000000000000 E/TC:? 0 x6 0000000000000000 x7 0000000000000000 E/TC:? 0 x8 0000000000000000 x9 0000000000000000 E/TC:? 0 x10 0000000000000000 x11 0000000000000000 E/TC:? 0 x12 0000000000000000 x13 0000000040015f80 E/TC:? 0 x14 0000000000000000 x15 0000000000000000 E/TC:? 0 x16 0000000000000000 x17 0000000000000000 E/TC:? 0 x18 0000000000000000 x19 0000000000000000 E/TC:? 0 x20 0000000000000000 x21 0000000000000000 E/TC:? 0 x22 0000000000000000 x23 0000000000000000 E/TC:? 0 x24 0000000000000000 x25 0000000000000000 E/TC:? 0 x26 0000000000000000 x27 0000000000000000 E/TC:? 0 x28 0000000000000000 x29 0000000000000000 E/TC:? 0 x30 0000000000000000 elr 00000000400410e4 E/TC:? 0 sp_el0 0000000040015f80 E/LD: Status of TA 133af0ca-bdab-11eb-9130-43bf7873bf67 E/LD: arch: arm E/LD: region 0: va 0x40005000 pa 0x0e301000 size 0x002000 flags rw-s (ldelf) E/LD: region 1: va 0x40007000 pa 0x0e303000 size 0x008000 flags r-xs (ldelf) E/LD: region 2: va 0x4000f000 pa 0x0e30b000 size 0x001000 flags rw-s (ldelf) E/LD: region 3: va 0x40010000 pa 0x0e30c000 size 0x004000 flags rw-s (ldelf) E/LD: region 4: va 0x40014000 pa 0x0e310000 size 0x001000 flags r--s E/LD: region 5: va 0x40015000 pa 0x0e32f000 size 0x001000 flags rw-s (stack) E/LD: region 6: va 0x4003f000 pa 0x00010000 size 0x01e000 flags rwxs [0] E/LD: [0] 133af0ca-bdab-11eb-9130-43bf7873bf67 @ 0x4003f000 Tested-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
At this point our CI only does 32-bit TAs build testing but I will enable runtime tested once OP-TEE build system support: OP-TEE/build#717 is merged. This PR is a dependency for that. |
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Thanks @jforissier for your testing, tag applied. |
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@b49020 could you create a pull request in https://github.com/OP-TEE/manifest to update to the tip of the no-std branch? |
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@jforissier manifest PR: OP-TEE/manifest#265 |
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Refactor TAs build script code to reuse 64K section alignment hook for 32-bit TAs. This would allow linker to separate executable code from writable data and in turn fix following runtime abort with 32-bit TAs:
E/TC:? 0
E/TC:? 0 User mode prefetch-abort at address 0x400410e4 (read permission fault)
E/TC:? 0 esr 0x8200000f ttbr0 0x200000e1b2020 ttbr1 0x00000000 cidr 0x0
E/TC:? 0 cpu #1 cpsr 0x00000110
E/TC:? 0 x0 0000000000000000 x1 000000000009e850
E/TC:? 0 x2 0000000040015f80 x3 0000000000000000
E/TC:? 0 x4 0000000000000000 x5 0000000000000000
E/TC:? 0 x6 0000000000000000 x7 0000000000000000
E/TC:? 0 x8 0000000000000000 x9 0000000000000000
E/TC:? 0 x10 0000000000000000 x11 0000000000000000
E/TC:? 0 x12 0000000000000000 x13 0000000040015f80
E/TC:? 0 x14 0000000000000000 x15 0000000000000000
E/TC:? 0 x16 0000000000000000 x17 0000000000000000
E/TC:? 0 x18 0000000000000000 x19 0000000000000000
E/TC:? 0 x20 0000000000000000 x21 0000000000000000
E/TC:? 0 x22 0000000000000000 x23 0000000000000000
E/TC:? 0 x24 0000000000000000 x25 0000000000000000
E/TC:? 0 x26 0000000000000000 x27 0000000000000000
E/TC:? 0 x28 0000000000000000 x29 0000000000000000
E/TC:? 0 x30 0000000000000000 elr 00000000400410e4
E/TC:? 0 sp_el0 0000000040015f80
E/LD: Status of TA 133af0ca-bdab-11eb-9130-43bf7873bf67
E/LD: arch: arm
E/LD: region 0: va 0x40005000 pa 0x0e301000 size 0x002000 flags rw-s (ldelf)
E/LD: region 1: va 0x40007000 pa 0x0e303000 size 0x008000 flags r-xs (ldelf)
E/LD: region 2: va 0x4000f000 pa 0x0e30b000 size 0x001000 flags rw-s (ldelf)
E/LD: region 3: va 0x40010000 pa 0x0e30c000 size 0x004000 flags rw-s (ldelf)
E/LD: region 4: va 0x40014000 pa 0x0e310000 size 0x001000 flags r--s
E/LD: region 5: va 0x40015000 pa 0x0e32f000 size 0x001000 flags rw-s (stack)
E/LD: region 6: va 0x4003f000 pa 0x00010000 size 0x01e000 flags rwxs [0]
E/LD: [0] 133af0ca-bdab-11eb-9130-43bf7873bf67 @ 0x4003f000