boards/arm/stm32[f7|l4]: fix SPI chip select GPIO access #5697
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
pkarashchenko
force-pushed
the
bugfix/stm32_spi
branch
from
c913c3c
to
3a3dcf1
Compare
acassis
reviewed
Mar 9, 2022
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
pkarashchenko
force-pushed
the
bugfix/stm32_spi
branch
from
3a3dcf1
to
502c1d3
Compare
xiaoxiang781216
approved these changes
Mar 9, 2022
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Summary
Out of bound array access happen for some of STM32 based boards during SPI chip select operation.
Impact
SMT32 based boards that use SPI.
Testing
Pass CI