Pretender beta

Makefile

@@ -144,6 +144,7 @@ GENERATED_FILES += qapi/qapi-commands-tpm.h qapi/qapi-commands-tpm.c
 GENERATED_FILES += qapi/qapi-commands-trace.h qapi/qapi-commands-trace.c
 GENERATED_FILES += qapi/qapi-commands-transaction.h qapi/qapi-commands-transaction.c
 GENERATED_FILES += qapi/qapi-commands-ui.h qapi/qapi-commands-ui.c
+GENERATED_FILES += qapi/qapi-commands-avatar.h qapi/qapi-commands-avatar.c
 GENERATED_FILES += qapi/qapi-events.h qapi/qapi-events.c
 GENERATED_FILES += qapi/qapi-events-block-core.h qapi/qapi-events-block-core.c
 GENERATED_FILES += qapi/qapi-events-block.h qapi/qapi-events-block.c
@@ -598,7 +599,8 @@ qapi-modules = $(SRC_PATH)/qapi/qapi-schema.json $(SRC_PATH)/qapi/common.json \
                $(SRC_PATH)/qapi/tpm.json \
                $(SRC_PATH)/qapi/trace.json \
                $(SRC_PATH)/qapi/transaction.json \
-               $(SRC_PATH)/qapi/ui.json
+               $(SRC_PATH)/qapi/ui.json \
+               $(SRC_PATH)/qapi/avatar.json \
 
 qapi/qapi-builtin-types.c qapi/qapi-builtin-types.h \
 qapi/qapi-types.c qapi/qapi-types.h \
@@ -656,6 +658,7 @@ qapi/qapi-commands-tpm.c qapi/qapi-commands-tpm.h \
 qapi/qapi-commands-trace.c qapi/qapi-commands-trace.h \
 qapi/qapi-commands-transaction.c qapi/qapi-commands-transaction.h \
 qapi/qapi-commands-ui.c qapi/qapi-commands-ui.h \
+qapi/qapi-commands-avatar.c qapi/qapi-commands-avatar.h \
 qapi/qapi-events.c qapi/qapi-events.h \
 qapi/qapi-events-block-core.c qapi/qapi-events-block-core.h \
 qapi/qapi-events-block.c qapi/qapi-events-block.h \

Makefile.objs

@@ -40,6 +40,7 @@ util-obj-y += qapi/qapi-visit-tpm.o
 util-obj-y += qapi/qapi-visit-trace.o
 util-obj-y += qapi/qapi-visit-transaction.o
 util-obj-y += qapi/qapi-visit-ui.o
+util-obj-y += qapi/qapi-visit-avatar.o
 util-obj-y += qapi/qapi-events.o
 util-obj-y += qapi/qapi-events-block-core.o
 util-obj-y += qapi/qapi-events-block.o
@@ -155,6 +156,7 @@ common-obj-y += qapi/qapi-commands-tpm.o
 common-obj-y += qapi/qapi-commands-trace.o
 common-obj-y += qapi/qapi-commands-transaction.o
 common-obj-y += qapi/qapi-commands-ui.o
+common-obj-y += qapi/qapi-commands-avatar.o
 common-obj-y += qapi/qapi-introspect.o
 common-obj-y += qmp.o hmp.o
 endif

cpus.c

@@ -2117,7 +2117,7 @@ int vm_stop(RunState state)
         return 0;
     }
 
-    return do_vm_stop(state, true);
+    return do_vm_stop(state, false);
 }
 
 /**
@@ -2140,13 +2140,13 @@ int vm_prepare_start(void)
      * the STOP event.
      */
     if (runstate_is_running()) {
-        qapi_event_send_stop();
-        qapi_event_send_resume();
+        //qapi_event_send_stop();
+        //qapi_event_send_resume();
         return -1;
     }
 
     /* We are sending this now, but the CPUs will be resumed shortly later */
-    qapi_event_send_resume();
+    //qapi_event_send_resume();
 
     replay_enable_events();
     cpu_enable_ticks();

hw/avatar/Makefile.objs

@@ -1,2 +1,3 @@
 obj-$(TARGET_ARM)  += avatar_posix.o configurable_machine.o remote_memory.o arm_helper.o
 obj-$(TARGET_MIPS) += avatar_posix.o configurable_machine.o remote_memory.o
+obj-$(CONFIG_SOFTMMU) += interrupts.o

hw/avatar/configurable_machine.c

@@ -33,6 +33,7 @@
 #ifdef TARGET_ARM
 #include "target/arm/cpu.h"
 #include "hw/arm/arm.h"
+#include "hw/arm/armv7m.h"
 #include "hw/avatar/arm_helper.h"
 #endif
 
@@ -66,6 +67,7 @@ static inline void set_feature(CPUARMState *env, int feature)
 
 // For now, this function is unused so let's prevent the compiler from failing.
 static inline void unset_feature(CPUARMState *env, int feature) __attribute__ ((unused));
+
 static inline void unset_feature(CPUARMState *env, int feature)
 {
     env->features &= ~(1ULL << feature);
@@ -111,7 +113,6 @@ static QDict * load_configuration(const char * filename)
         exit(1);
     }
 
-
     obj_dict = qobject_to(QDict, obj);
     if (!obj_dict) {
         qobject_unref(obj);
@@ -338,7 +339,7 @@ static void init_memory_area(QDict *mapping, const char *kernel_filename)
 
         }
 
-        printf("Configurable: Inserting 0x%"
+        printf("Configurable: Inserting %"
                PRIx64 " bytes of data in memory region %s\n", data_size, name);
         //Size of data to put into a RAM region needs to fit in the RAM region
         g_assert(data_size <= size);
@@ -439,7 +440,6 @@ static ARMCPU *create_cpu(MachineState * ms, QDict *conf)
     DeviceState *dstate; //generic device if CPU can be initiliazed via qdev-API
     int num_irq = 64;
 
-
     if (qdict_haskey(conf, "cpu_model"))
     {
         cpu_model = qdict_get_str(conf, "cpu_model");
@@ -478,28 +478,28 @@ static ARMCPU *create_cpu(MachineState * ms, QDict *conf)
             exit(1);
         }
 
-    cpuobj = object_new(object_class_get_name(cpu_oc));
+        cpuobj = object_new(object_class_get_name(cpu_oc));
 
-    object_property_set_bool(cpuobj, true, "realized", &error_fatal);
-    cpuu = ARM_CPU(cpuobj);
+        object_property_set_bool(cpuobj, true, "realized", &error_fatal);
+        cpuu = ARM_CPU(cpuobj);
     }
-
     env = (CPUState *) &(cpuu->env);
     if (!env)
     {
-        fprintf(stderr, "Unable to find CPU definition\n");
-        exit(1);
+            fprintf(stderr, "Unable to find CPU definition\n");
+            exit(1);
     }
 
     avatar_add_banked_registers(cpuu);
     set_feature(&cpuu->env, ARM_FEATURE_CONFIGURABLE);
     return cpuu;
 }
+
+
 #elif TARGET_MIPS
 static MIPSCPU *create_cpu(MachineState * ms, QDict *conf)
 {
     const char *cpu_model = ms->cpu_type;
-    i
     MIPSCPU *cpuu;
     CPUState *cpu;
 

hw/avatar/interrupts.c

@@ -0,0 +1,180 @@
+
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "qemu/error-report.h"
+#include "qemu-common.h"
+#include "qapi/qapi-commands-avatar.h"
+#include "qapi/error.h"
+
+#include "hw/sysbus.h"
+#include "sysemu/sysemu.h"
+
+#ifdef TARGET_ARM
+#include "target/arm/cpu.h"
+#elif TARGET_MIPS
+#include "target/mips/cpu.h"
+#endif
+
+#include "hw/avatar/interrupts.h"
+#include "hw/avatar/avatar_posix.h"
+#include "hw/avatar/remote_memory.h"
+
+
+static QemuAvatarMessageQueue *irq_rx_queue_ref = NULL;
+static QemuAvatarMessageQueue *irq_tx_queue_ref = NULL;
+
+extern  QemuAvatarMessageQueue *rmem_rx_queue_ref;
+extern  QemuAvatarMessageQueue *rmem_tx_queue_ref;
+
+static uint64_t req_id;
+
+static bool armv7m_exception_handling_enabled = false;
+static uint8_t ignore_irq_return_map[32] = {0};
+
+
+void qmp_avatar_armv7m_set_vector_table_base(int64_t num_cpu, int64_t base, Error **errp)
+{
+#ifdef TARGET_ARM
+    qemu_log_mask(LOG_AVATAR, "Changing NVIC base to%lx\n", base & 0xffffff80);
+    ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(num_cpu));
+    /* MM: qemu now has multiple vecbases, we may need to fix this */
+    armcpu->env.v7m.vecbase[armcpu->env.v7m.secure] = base & 0xffffff80;
+#endif
+}
+
+
+void avatar_armv7m_nvic_forward_write(uint32_t offset, uint32_t value, unsigned size){
+    int ret;
+    RemoteMemoryResp resp;
+
+    qemu_log_mask(LOG_AVATAR, "armv7m nvic write at offset 0x%x\n", offset);
+    qemu_log_flush();
+    if(!armv7m_exception_handling_enabled){
+        return;
+    }
+
+    memset(&resp, 0, sizeof(resp));
+
+    uint64_t pc = get_current_pc();
+
+    //for now, assusme nvic at the standard location at 0xE000E000
+    MemoryForwardReq request = {req_id++, pc, 0xe000e000+offset, value, size, AVATAR_WRITE};
+
+    qemu_avatar_mq_send(rmem_tx_queue_ref, &request, sizeof(request));
+    ret = qemu_avatar_mq_receive(rmem_rx_queue_ref, &resp, sizeof(resp));
+    if(!resp.success || (resp.id != request.id)){
+
+        error_report("RemoteMemoryWrite for NVIC failed (%d)!\n", ret);
+        exit(1);
+    }
+}
+
+void qmp_avatar_armv7m_enable_irq(const char *irq_rx_queue_name,
+                                  const char *irq_tx_queue_name, 
+                                  const char *rmem_rx_queue_name,
+                                  const char *rmem_tx_queue_name, Error **errp)
+{
+    if(irq_rx_queue_ref == NULL){
+        irq_rx_queue_ref = malloc(sizeof(QemuAvatarMessageQueue));
+        qemu_avatar_mq_open_read(irq_rx_queue_ref, irq_rx_queue_name,
+                sizeof(V7MInterruptResp));
+    }
+    if(irq_tx_queue_ref == NULL){
+        irq_tx_queue_ref = malloc(sizeof(QemuAvatarMessageQueue));
+        qemu_avatar_mq_open_write(irq_tx_queue_ref, irq_tx_queue_name,
+                sizeof(V7MInterruptReq));
+    }
+
+    if(rmem_rx_queue_ref == NULL){
+        rmem_rx_queue_ref = malloc(sizeof(QemuAvatarMessageQueue));
+        qemu_avatar_mq_open_read(rmem_rx_queue_ref, rmem_rx_queue_name, sizeof(RemoteMemoryResp));
+    }
+    if(rmem_tx_queue_ref == NULL){
+        rmem_tx_queue_ref = malloc(sizeof(QemuAvatarMessageQueue));
+        qemu_avatar_mq_open_write(rmem_tx_queue_ref, rmem_tx_queue_name, sizeof(MemoryForwardReq));
+    }
+
+    armv7m_exception_handling_enabled = true;
+    qemu_log_mask(LOG_AVATAR, "armv7m interrupt injection enabled\n");
+    qemu_log_flush();
+}
+
+
+void qmp_avatar_armv7m_disable_irq(Error **errp)
+{
+    qemu_log_mask(LOG_AVATAR, "armv7m interrupt injection disabled\n");
+    armv7m_exception_handling_enabled = false;
+    qemu_log_flush();
+}
+
+
+void qmp_avatar_armv7m_ignore_irq_return(int64_t num_irq, Error **errp)
+{
+    ignore_irq_return_map[num_irq/8] |= 1 << num_irq % 8;
+}
+
+void qmp_avatar_armv7m_unignore_irq_return(int64_t num_irq, Error **errp)
+{
+    ignore_irq_return_map[num_irq/8] &= 0 << num_irq % 8;
+}
+
+void qmp_avatar_armv7m_inject_irq(int64_t num_cpu,int64_t num_irq, Error **errp)
+{
+#ifdef TARGET_ARM
+    qemu_log_mask(LOG_AVATAR, "Injecting exception 0x%lx\n", num_irq);
+    ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(num_cpu));
+    CPUARMState *env = &armcpu->env;
+    /*  MM: for now, we can only inject non-secure irqs */
+    armv7m_nvic_set_pending(env->nvic, num_irq, false);
+#endif
+}
+
+
+void avatar_armv7m_exception_exit(int irq, uint32_t type)
+{
+    int ret;
+    V7MInterruptResp resp;
+    V7MInterruptReq request = {req_id++, irq, INTERRUPT_EXIT, type};
+
+    if( (ignore_irq_return_map[irq/8] & 1 << irq % 8) || !armv7m_exception_handling_enabled)
+    {
+        qemu_log_mask(LOG_AVATAR, "Returning form 0x%x - Ignored by avatar\n", irq);
+    }
+    else{
+        qemu_log_mask(LOG_AVATAR, "Returning form 0x%x\n", irq);
+        memset(&resp, 0, sizeof(resp));
+
+        qemu_avatar_mq_send(irq_tx_queue_ref, &request, sizeof(request));
+        ret = qemu_avatar_mq_receive(irq_rx_queue_ref, &resp, sizeof(resp));
+
+        if(!resp.success || (resp.id != request.id) || (resp.operation != INTERRUPT_EXIT) ){
+            error_report("ARMv7mInterruptRequest failed (%d)!\n", ret);
+            exit(1);
+        }
+    }
+}
+
+void avatar_armv7m_exception_enter(int irq)
+{
+    int ret;
+    V7MInterruptResp resp;
+    V7MInterruptReq request = {req_id++, irq, INTERRUPT_ENTER, 0};
+
+    if( (ignore_irq_return_map[irq/8] & 1 << irq % 8) || !armv7m_exception_handling_enabled)
+    {
+        qemu_log_mask(LOG_AVATAR, "Entered IRQ 0x%x - Ignored by avatar\n", irq);
+    }
+    else{
+        qemu_log_mask(LOG_AVATAR, "Entering IRQ 0x%x\n", irq);
+        memset(&resp, 0, sizeof(resp));
+
+        qemu_avatar_mq_send(irq_tx_queue_ref, &request, sizeof(request));
+        ret = qemu_avatar_mq_receive(irq_rx_queue_ref, &resp, sizeof(resp));
+
+        if(!resp.success || (resp.id != request.id) || (resp.operation != INTERRUPT_ENTER)){
+            error_report("ARMv7mInterruptRequest failed (%d)!\n", ret);
+            exit(1);
+        }
+    }
+}
+

hw/avatar/remote_memory.c

@@ -7,6 +7,7 @@
 #include "qemu/error-report.h"
 #include "hw/sysbus.h"
 
+#include "hw/avatar/remote_memory.h"
 #include "hw/avatar/avatar_posix.h"
 #include "hw/avatar/remote_memory.h"
 
@@ -102,11 +103,12 @@ static Property avatar_rmemory_properties[] = {
 
 //}
 
+QemuAvatarMessageQueue *rmem_rx_queue_ref = NULL;
+QemuAvatarMessageQueue *rmem_tx_queue_ref = NULL;
+
 static void avatar_rmemory_realize(DeviceState *dev, Error **errp)
 {
 
-    static QemuAvatarMessageQueue *rx_queue_ref = NULL;
-    static QemuAvatarMessageQueue *tx_queue_ref = NULL;
 
 
     AvatarRMemoryState *s = AVATAR_RMEMORY(dev);
@@ -115,17 +117,17 @@ static void avatar_rmemory_realize(DeviceState *dev, Error **errp)
     sysbus_init_mmio(sbd, &s->iomem);
     sysbus_init_irq(sbd, &s->irq);
 
-    if(rx_queue_ref == NULL){
-        rx_queue_ref = malloc(sizeof(QemuAvatarMessageQueue));
-        qemu_avatar_mq_open_read(rx_queue_ref, s->rx_queue_name, sizeof(RemoteMemoryResp));
+    if(rmem_rx_queue_ref == NULL){
+        rmem_rx_queue_ref = malloc(sizeof(QemuAvatarMessageQueue));
+        qemu_avatar_mq_open_read(rmem_rx_queue_ref, s->rx_queue_name, sizeof(RemoteMemoryResp));
     }
-    if(tx_queue_ref == NULL){
-        tx_queue_ref = malloc(sizeof(QemuAvatarMessageQueue));
-        qemu_avatar_mq_open_write(tx_queue_ref, s->tx_queue_name, sizeof(MemoryForwardReq));
+    if(rmem_tx_queue_ref == NULL){
+        rmem_tx_queue_ref = malloc(sizeof(QemuAvatarMessageQueue));
+        qemu_avatar_mq_open_write(rmem_tx_queue_ref, s->tx_queue_name, sizeof(MemoryForwardReq));
     }
 
-    s->rx_queue = rx_queue_ref;
-    s->tx_queue = tx_queue_ref;
+    s->rx_queue = rmem_rx_queue_ref;
+    s->tx_queue = rmem_tx_queue_ref;
     s->request_id = 0;
 
 }