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Merge pull request #113 from beehive-lab/feature/aarch64-bootstrapping
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Feature/aarch64 bootstrapping
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zakkak committed May 29, 2018
2 parents 488a684 + c82ce15 commit a5df07a
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Showing 74 changed files with 2,812 additions and 2,232 deletions.
4 changes: 3 additions & 1 deletion Jenkinsfile
Expand Up @@ -46,6 +46,8 @@ pipeline {
parallel 'image': {
dir(env.MAXINE_HOME) {
sh '$MX image @c1xgraal'
sh '$MX image -platform linux-aarch64 -isa Aarch64 --build=DEBUG'
sh '$MX image -platform linux-arm -isa ARMV7 --build=DEBUG'
sh '$MX image'
}
}, 'test-init': {
Expand All @@ -66,7 +68,7 @@ pipeline {
}
}, 'crossisa': {
dir(env.MAXINE_HOME) {
sh '$MX --J @"-Dmax.platform=linux-aarch64 -Dtest.crossisa.qemu=1 -ea" test -s=t -junit-test-timeout=1800 -tests=junit:aarch64.asm+Aarch64T1XTest+Aarch64JTT'
sh '$MX --J @"-Dmax.platform=linux-aarch64 -Dtest.crossisa.qemu=1 -ea" test -s=t -junit-test-timeout=1800 -tests=junit:aarch64.asm+Aarch64T1XTest+Aarch64T1XpTest+Aarch64JTT'
sh '$MX --J @"-Dmax.platform=linux-arm -Dtest.crossisa.qemu=1 -ea" test -s=t -junit-test-timeout=1800 -tests=junit:armv7.asm+ARMV7T1XTest+ARMV7JTT'
sh '$MX --J @"-Dmax.platform=linux-riscv64 -Dtest.crossisa.qemu=1 -ea" test -s=t -tests=junit:riscv64.asm'
}
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Expand Up @@ -85,7 +85,8 @@ public class Aarch64 extends CiArchitecture {
// Register used to store metaspace method.
// see definition in sharedRuntime_aarch64.cpp:gen_c2i_adapter
public static final CiRegister metaspaceMethodRegister = r12;
public static final CiRegister LATCH_REGISTER = r10;
// ATTENTION: must be callee-saved by all C ABIs in use.
public static final CiRegister LATCH_REGISTER = r26;
/********************************************************************************************************/

// Floating point and SIMD registers
Expand Down Expand Up @@ -125,7 +126,7 @@ public class Aarch64 extends CiArchitecture {
public static final CiRegister[] cpuRegisters = {
r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13,
r14, r15, r16, r17, r18, r19, r20, r21, r22, r23, r24,
r25, r26, r27, r28, r29, r30, r31, sp, zr
r25, r26, r27, r28, r29, r30, // Exclude special register 31 /* r31, sp, zr */
};

public static final CiRegister[] fpuRegisters = {
Expand All @@ -134,6 +135,15 @@ public class Aarch64 extends CiArchitecture {
d25, d26, d27, d28, d29, d30, d31
};

public static final CiRegister[] csaRegisters = {
r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13,
r14, r15, r16, r17, r18, r19, r20, r21, r22, r23, r24,
r25, r26, r27, r28, r29, r30, // Exclude special register 31 /* r31, sp, zr */
d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12, d13,
d14, d15, d16, d17, d18, d19, d20, d21, d22, d23, d24,
d25, d26, d27, d28, d29, d30, d31
};

public static final CiRegister[] allRegisters = {
r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13,
r14, r15, r16, r17, r18, r19, r20, r21, r22, r23, r24,
Expand Down
Expand Up @@ -189,47 +189,73 @@ private Aarch64Address(CiKind kind, CiValue base, CiValue offset, int immediate,
this.immediate = immediate;
this.scaled = scaled;
this.extendType = extendType;
assert verify();
verify();
}

private boolean verify() {
private void verify() {
assert addressingMode != null;
assert Aarch64.isIntReg(base) && Aarch64.isIntReg(offset);
switch (addressingMode) {
case IMMEDIATE_SCALED:
// System.out.println("@IMMEDIATE_SCALED");
return !base.equals(zr) && offset.equals(zr) && extendType == null && NumUtil.isUnsignedNbit(12, immediate);
assert !base.equals(zr);
assert offset.equals(zr);
assert extendType == null;
assert NumUtil.isUnsignedNbit(12, immediate);
break;
case IMMEDIATE_UNSCALED:
// System.out.println("@IMMEDIATE_UNSCALED");
// System.out.println("!base.equals(zr): " + (!base.equals(zr)));
// System.out.println("offset.equals(zr): " + (offset.equals(zr)));
// System.out.println("extendType == null: " + (extendType == null));
// System.out.println("NumUtil.isSignedNbit(9, "+ immediate +"): " + (NumUtil.isSignedNbit(9, immediate)));
return !base.equals(zr) && offset.equals(zr) && extendType == null && NumUtil.isSignedNbit(9, immediate);
assert !base.equals(zr);
assert offset.equals(zr);
assert extendType == null;
assert NumUtil.isSignedNbit(9, immediate);
break;
case BASE_REGISTER_ONLY:
// System.out.println("@BASE_REGISTER_ONLY");
return !base.equals(zr) && offset.equals(zr) && extendType == null && immediate == 0;
assert !base.equals(zr);
assert offset.equals(zr);
assert extendType == null;
assert immediate == 0;
break;
case REGISTER_OFFSET:
// System.out.println("@REGISTER_OFFSET");
return !base.equals(zr) && Aarch64.isGeneralPurposeReg(offset) && extendType == null && immediate == 0;
assert !base.equals(zr);
assert Aarch64.isGeneralPurposeReg(offset);
assert extendType == null;
assert immediate == 0;
break;
case EXTENDED_REGISTER_OFFSET:
// System.out.println("@EXTENDED_REGISTER_OFFSET");
return !base.equals(zr) && Aarch64.isGeneralPurposeReg(offset) &&
(extendType == Aarch64Assembler.ExtendType.SXTW || extendType == Aarch64Assembler.ExtendType.UXTW) &&
immediate == 0;
assert !base.equals(zr);
assert Aarch64.isGeneralPurposeReg(offset);
assert extendType == Aarch64Assembler.ExtendType.SXTW || extendType == Aarch64Assembler.ExtendType.UXTW;
assert immediate == 0;
break;
case PC_LITERAL:
// System.out.println("@PC_LITERAL");
// System.out.println("base.equals(zr):" + base.equals(zr));
// System.out.println("offset.equals(zr): " + offset.equals(zr));
// System.out.println("extendType == null: " + (extendType == null));
// System.out.println("NumUtil.isSignedNbit(21, immediate): " + NumUtil.isSignedNbit(21, immediate));
// System.out.println("(immediate & 0x3) == 0: " + ((immediate & 0x3) == 0));
return base.equals(zr) && offset.equals(zr) && extendType == null &&
NumUtil.isSignedNbit(21, immediate) && ((immediate & 0x3) == 0);
assert base.equals(zr);
assert offset.equals(zr);
assert extendType == null;
assert NumUtil.isSignedNbit(21, immediate);
assert (immediate & 0x3) == 0;
break;
case IMMEDIATE_POST_INDEXED:
case IMMEDIATE_PRE_INDEXED:
// System.out.println("@IMMEDIATE_POST_INDEXED|IMMEDIATE_PRE_INDEXED");
return !base.equals(zr) && offset.equals(zr) && extendType == null && NumUtil.isSignedNbit(9, immediate);
assert !base.equals(zr);
assert offset.equals(zr);
assert extendType == null;
assert NumUtil.isSignedNbit(9, immediate);
break;
default:
throw new Error("should not reach here");
}
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