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#87 - added missing R access for the rIP operand for SYSCALL in…
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…structions; added missing `SCS`, `rCX` and `rDX` operands for `SYSEXIT` instruction.
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@vlutas
vlutas committed Feb 27, 2024
1 parent f6f93c4 commit 02cbe6a
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Showing 9 changed files with 19 additions and 10 deletions.
7 changes: 5 additions & 2 deletions bddisasm/include/bdx86_instructions.h
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Expand Up @@ -72478,7 +72478,7 @@ const ND_IDBE gInstructions[4075] =
OP(ND_OPT_rCX, ND_OPS_q, ND_OPF_OPDEF, ND_OPA_W, 0, 0),
OP(ND_OPT_rR11, ND_OPS_q, ND_OPF_OPDEF, ND_OPA_W, 0, 0),
OP(ND_OPT_CS, ND_OPS_v, ND_OPF_OPDEF, ND_OPA_W, 0, 0),
OP(ND_OPT_rIP, ND_OPS_v, ND_OPF_OPDEF, ND_OPA_W, 0, 0),
OP(ND_OPT_rIP, ND_OPS_v, ND_OPF_OPDEF, ND_OPA_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_OPDEF, ND_OPA_RW, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_OPDEF, ND_OPA_RW, 0, 0),
},
Expand Down Expand Up @@ -72527,7 +72527,7 @@ const ND_IDBE gInstructions[4075] =
.ValidPrefixes = 0,
.ValidModes = ND_MOD_R0|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXR_SEAM|ND_MOD_VMXN_SEAM|ND_MOD_VMX_OFF|ND_MOD_SMM|ND_MOD_SMM_OFF|ND_MOD_SGX_OFF|ND_MOD_TSX|ND_MOD_TSX_OFF,
.ValidDecorators = 0,
.OpsCount = ND_OPS_CNT(0, 5),
.OpsCount = ND_OPS_CNT(0, 8),
.TupleType = 0,
.ExcType = 0,
.FpuFlags = 0,
Expand All @@ -72545,6 +72545,9 @@ const ND_IDBE gInstructions[4075] =
OP(ND_OPT_CS, ND_OPS_v, ND_OPF_OPDEF, ND_OPA_W, 0, 0),
OP(ND_OPT_rIP, ND_OPS_v, ND_OPF_OPDEF, ND_OPA_W, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_OPDEF, ND_OPA_W, 0, 0),
OP(ND_OPT_SCS, ND_OPS_q, ND_OPF_OPDEF, ND_OPA_R, 0, 0),
OP(ND_OPT_rCX, ND_OPS_v, ND_OPF_OPDEF, ND_OPA_R, 0, 0),
OP(ND_OPT_rDX, ND_OPS_v, ND_OPF_OPDEF, ND_OPA_R, 0, 0),
},
},

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3 changes: 3 additions & 0 deletions bddisasm_test/x86/basic/branch_32.result
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Expand Up @@ -827,4 +827,7 @@
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 4, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: SSP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 5, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: 0x00000174, RegCount: 1
Operand: 6, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
Operand: 7, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 2, RegCount: 1

5 changes: 4 additions & 1 deletion bddisasm_test/x86/basic/branch_64.result
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Expand Up @@ -586,7 +586,7 @@
Operand: 4, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
Operand: 5, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 11, RegCount: 1
Operand: 6, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Segment, RegSize: 8, RegId: 1, RegCount: 1
Operand: 7, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
Operand: 7, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
Operand: 8, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
Operand: 9, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: SSP, RegSize: 8, RegId: 0, RegCount: 1

Expand All @@ -608,4 +608,7 @@
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Segment, RegSize: 8, RegId: 1, RegCount: 1
Operand: 3, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
Operand: 4, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: SSP, RegSize: 8, RegId: 0, RegCount: 1
Operand: 5, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: 0x00000174, RegCount: 1
Operand: 6, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
Operand: 7, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 2, RegCount: 1

2 changes: 1 addition & 1 deletion bddisasm_test/x86/special/invalid_32_skip.result
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Expand Up @@ -21,7 +21,7 @@
Operand: 4, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
Operand: 5, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 11, RegCount: 1
Operand: 6, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 7, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 7, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 8, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
Operand: 9, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: SSP, RegSize: 4, RegId: 0, RegCount: 1

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2 changes: 1 addition & 1 deletion bddisasm_test/x86/special/only_64.result
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Expand Up @@ -80,7 +80,7 @@
Operand: 4, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
Operand: 5, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 11, RegCount: 1
Operand: 6, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Segment, RegSize: 8, RegId: 1, RegCount: 1
Operand: 7, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
Operand: 7, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
Operand: 8, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
Operand: 9, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: SSP, RegSize: 8, RegId: 0, RegCount: 1

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2 changes: 1 addition & 1 deletion bddisasm_test/x86/special/regressions_32.result
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Expand Up @@ -102,7 +102,7 @@
Operand: 4, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
Operand: 5, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 11, RegCount: 1
Operand: 6, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 7, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 7, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 8, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
Operand: 9, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: SSP, RegSize: 4, RegId: 0, RegCount: 1

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2 changes: 1 addition & 1 deletion bindings/pybddisasm/setup.py
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Expand Up @@ -12,7 +12,7 @@
from codecs import open

VERSION = (0, 3, 0)
LIBRARY_VERSION = (2, 1, 1)
LIBRARY_VERSION = (2, 1, 2)
DIR_INCLUDE = '../../inc'

here = os.path.abspath(os.path.dirname(__file__))
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2 changes: 1 addition & 1 deletion inc/bddisasm_version.h
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Expand Up @@ -7,7 +7,7 @@

#define DISASM_VERSION_MAJOR 2
#define DISASM_VERSION_MINOR 1
#define DISASM_VERSION_REVISION 1
#define DISASM_VERSION_REVISION 2

#define SHEMU_VERSION_MAJOR DISASM_VERSION_MAJOR
#define SHEMU_VERSION_MINOR DISASM_VERSION_MINOR
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4 changes: 2 additions & 2 deletions isagenerator/instructions/table_legacy_1.dat
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Expand Up @@ -92,7 +92,7 @@ LAR ; Gv,Rz ; Fv ; 0x0F 0x02 /r:r
LSL ; Gv,Mw ; Fv ; 0x0F 0x03 /r:mem ; s:I286PROT, t:SYSTEM, w:RW|R|W, f:ZF=m, m:NOREAL
LSL ; Gv,Rz ; Fv ; 0x0F 0x03 /r:reg ; s:I286PROT, t:SYSTEM, w:RW|R|W, f:ZF=m, m:NOREAL
#LOADALL ; ; BANK ; 0x0F 0x05 ; s:I486REAL, t:UNDOC, w:R
SYSCALL ; ; STAR,LSTAR,FMASK,SS,RCX,R11,CS,rIP,Fv,SSP ; 0x0F 0x05 ; s:AMD, t:SYSCALL, w:R|R|R|W|W|W|W|W|RW|RW, a:F64|CETT, i:FSC, m:NOSGX
SYSCALL ; ; STAR,LSTAR,FMASK,SS,RCX,R11,CS,rIP,Fv,SSP ; 0x0F 0x05 ; s:AMD, t:SYSCALL, w:R|R|R|W|W|W|W|RW|RW|RW, a:F64|CETT, i:FSC, m:NOSGX
CLTS ; ; CR0 ; 0x0F 0x06 ; s:I286REAL, t:SYSTEM, w:W, m:KERNEL|NOV86
#LOADALLD ; ; BANK ; 0x0F 0x07 ; s:I486REAL, t:UNDOC, w:R
SYSRET ; ; STAR,SS,rCX,R11,CS,rIP,Fv,SSP ; 0x0F 0x07 ; s:AMD, t:SYSRET, w:R|W|R|R|W|W|W|W, i:FSC, m:KERNEL
Expand Down Expand Up @@ -290,7 +290,7 @@ RDTSC ; ; EAX,EDX,TSC ; 0x0F 0x31
RDMSR ; ; EAX,EDX,ECX,MSR ; 0x0F 0x32 ; s:PENTIUMREAL, t:SYSTEM, w:W|W|R|R, m:KERNEL|NOV86, i:MSR, a:NOREX2
RDPMC ; ; EAX,EDX,ECX,MSR ; 0x0F 0x33 ; s:RDPMC, t:SYSTEM, w:W|W|R|R, m:NOSGX, a:NOREX2
SYSENTER ; ; SCS,SESP,SEIP,SS,sSP,CS,rIP,Fv,SSP ; 0x0F 0x34 ; s:PPRO, t:SYSCALL, w:R|R|R|W|W|W|W|W|RW, a:CETT|NOREX2, i:SEP, f:IF=0, m:NOREAL|NOSGX
SYSEXIT ; ; SS,sSP,CS,rIP,SSP ; 0x0F 0x35 ; s:PPRO, t:SYSRET, w:W|W|W|W|W|W, a:F64|NOREX2, i:SEP, m:KERNEL|NOREAL
SYSEXIT ; ; SS,sSP,CS,rIP,SSP,SCS,rCX,rDX ; 0x0F 0x35 ; s:PPRO, t:SYSRET, w:W|W|W|W|W|R|R|R, a:F64|NOREX2, i:SEP, m:KERNEL|NOREAL
GETSEC ; ; EAX,EBX ; NP 0x0F 0x37 ; s:SMX, t:SYSTEM, w:RCW|R, m:KERNEL|NOREAL|NOSGX, a:NOREX2

# 0x40 - 0x4F
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