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Indirect Call Instructions should read Rip #87

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0x161e-swei opened this issue Feb 26, 2024 · 7 comments
Closed

Indirect Call Instructions should read Rip #87

0x161e-swei opened this issue Feb 26, 2024 · 7 comments

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@0x161e-swei
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I tried decode instruction ff d0 with the NdDecodeEx(&ix,...) function and it gave call rax.
However, the ix.RipAccess feild is set with only 0x2 and ix.StackAccess set to 0x2.

Since the call instructions should store the call-site onto the stack, should ix.RipAccess be 0x2 | 0x1?

ND_ACCESS_WRITE is defined as 0x2 and ND_ACCESS_READ is 0x1.

@vlutas
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vlutas commented Feb 26, 2024

Ha, that is correct! Somehow, the R part is missing from some of the CALL instructions. Will get back with a fix soon.
Thanks for pointing this out!

@vlutas
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vlutas commented Feb 26, 2024

Pushed a fix for this - it is available in the following commit: 3df189f

Thanks again for reporting this!

@vlutas vlutas closed this as completed Feb 26, 2024
vlutas added a commit that referenced this issue Feb 26, 2024
…lude read access, as the instruction pointer is saved on the stack.
@0x161e-swei
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Hi @vlutas Thanks a ton for the quick fix!
Upon closer inspection, I saw that syscall did not read from Rip, sysexit did not read from Rcx and Rdx.

Could you please fix these as well?

vlutas added a commit that referenced this issue Feb 27, 2024
…structions; added missing `SCS`, `rCX` and `rDX` operands for `SYSEXIT` instruction.
@vlutas
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vlutas commented Feb 27, 2024

Hello!
You are right, thanks for pointing this out as well. This should also be fixed with the latest commit.
Out of curiosity - what are you using bddisasm for? Generally, not very many people are interested in so deep details about the instructions operands & functionality.
Thanks again for reporting this!

@0x161e-swei
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Hi @vlutas, thanks for sending in the fixes.
I am trying to use bddisasm for decoding Intel PT traces for microarchitectural simulation in Champsim.

@0x161e-swei
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Hi @vlutas, sorry for keeping pinning in this thread.
I found that the "IRET" class of instructions are missing RW accesses to rSP?

@vlutas
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vlutas commented Mar 4, 2024

Hello!
That is actually intended. The point is that rSP and SS are only modified when doing an IRET to a different privilege level, and we cannot check that from BDDISASM. Due to this, we only store those operands that are guaranteed to be accessed.

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