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Thanks to Segher Boessenkool and Holis Blanchard. AIX and Darwin cache inquiry: http://gcc.gnu.org/ml/gcc-patches/2007-08/msg00388.html Auxiliary vectors: http://manugarg.googlepages.com/aboutelfauxiliaryvectors git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5973 c046a42c-6fe2-441c-8c8c-71466251a162
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malc
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Dec 10, 2008
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Original file line number | Diff line number | Diff line change |
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#include "cache-utils.h" | ||
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#ifdef __powerpc__ | ||
struct qemu_cache_conf qemu_cache_conf = { | ||
.dcache_bsize = 16, | ||
.icache_bsize = 16 | ||
}; | ||
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#if defined _AIX | ||
#include <sys/systemcfg.h> | ||
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static void ppc_init_cacheline_sizes(void) | ||
{ | ||
qemu_cache_conf.icache_bsize = _system_configuration.icache_line; | ||
qemu_cache_conf.dcache_bsize = _system_configuration.dcache_line; | ||
} | ||
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#elif defined __linux__ | ||
#include <linux/auxvec.h> | ||
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static void ppc_init_cacheline_sizes(char **envp) | ||
{ | ||
unsigned long *auxv; | ||
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while (*envp++); | ||
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for (auxv = (unsigned long *) envp; *auxv != AT_NULL; auxv += 2) { | ||
switch (*auxv) { | ||
case AT_DCACHEBSIZE: qemu_cache_conf.dcache_bsize = auxv[1]; break; | ||
case AT_ICACHEBSIZE: qemu_cache_conf.icache_bsize = auxv[1]; break; | ||
default: break; | ||
} | ||
} | ||
} | ||
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#elif defined __APPLE__ | ||
#include <sys/types.h> | ||
#include <sys/sysctl.h> | ||
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static void ppc_init_cacheline_sizes(void) | ||
{ | ||
size_t len; | ||
unsigned cacheline; | ||
int name[2] = { CTL_HW, HW_CACHELINE }; | ||
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if (sysctl(name, 2, &cacheline, &len, NULL, 0)) { | ||
perror("sysctl CTL_HW HW_CACHELINE failed"); | ||
} else { | ||
qemu_cache_conf.dcache_bsize = cacheline; | ||
qemu_cache_conf.icache_bsize = cacheline; | ||
} | ||
} | ||
#endif | ||
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#ifdef __linux__ | ||
void qemu_cache_utils_init(char **envp) | ||
{ | ||
ppc_init_cacheline_sizes(envp); | ||
} | ||
#else | ||
void qemu_cache_utils_init(char **envp) | ||
{ | ||
(void) envp; | ||
ppc_init_cacheline_sizes(); | ||
} | ||
#endif | ||
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#endif /* __powerpc__ */ |
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#ifndef QEMU_CACHE_UTILS_H | ||
#define QEMU_CACHE_UTILS_H | ||
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#ifdef __powerpc__ | ||
struct qemu_cache_conf { | ||
unsigned long dcache_bsize; | ||
unsigned long icache_bsize; | ||
}; | ||
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extern struct qemu_cache_conf qemu_cache_conf; | ||
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extern void qemu_cache_utils_init(char **envp); | ||
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/* mildly adjusted code from tcg-dyngen.c */ | ||
static inline void flush_icache_range(unsigned long start, unsigned long stop) | ||
{ | ||
unsigned long p, start1, stop1; | ||
unsigned long dsize = qemu_cache_conf.dcache_bsize; | ||
unsigned long isize = qemu_cache_conf.icache_bsize; | ||
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start1 = start & ~(dsize - 1); | ||
stop1 = (stop + dsize - 1) & ~(dsize - 1); | ||
for (p = start1; p < stop1; p += dsize) { | ||
asm volatile ("dcbst 0,%0" : : "r"(p) : "memory"); | ||
} | ||
asm volatile ("sync" : : : "memory"); | ||
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start &= start & ~(isize - 1); | ||
stop1 = (stop + isize - 1) & ~(isize - 1); | ||
for (p = start1; p < stop1; p += isize) { | ||
asm volatile ("icbi 0,%0" : : "r"(p) : "memory"); | ||
} | ||
asm volatile ("sync" : : : "memory"); | ||
asm volatile ("isync" : : : "memory"); | ||
} | ||
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#else | ||
#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0) | ||
#endif | ||
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#endif /* QEMU_CACHE_UTILS_H */ |
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