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VHDL Three-Bit Counter (Artix-7 family Nexys 4 FPGA)

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VHDL Three-Bit Counter (Artix-7 family Nexys 4 FPGA)

Creator: Ben Mighall

This program creates a 3-bit counter that displays 0,1,4,7,6,2,3,5 in order and uses the pushbuttons as a clock and reset. Number is displayed on LEDs in binary format. Button 4 serves as the reset and button 2 serves as the clock.

The following code was written as part of coursework for University of Mississippi class EL E 386 (Advanced Digital Systems Lab), and using an Artix-7 family Nexys 4 FPGA board. Constraints file is included in this repository.

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VHDL Three-Bit Counter (Artix-7 family Nexys 4 FPGA)

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